Fujitsu Corporation

Fujitsu Semiconductor Limited

Sony Corporation

Kazuyuki Imamura

Atsushi Kikuchi

Eiji Watanabe

Masaharu Minamizawa

Nobutaka Shimizu

Yasunori Fujimoto

Yoshiyuki Yoneda

Hirohisa Matsuki

Tadahiro Okamoto

Kenichi Kado

Nobukatsu Saito

Takahiro Yurino

Osamu Yamaguchi

Junichi Kasai

Takashi Suzuki

Masayuki Kato

Mitsutaka Sato

Daisuke Mizutani

Aiichiro Inoue

Iwao Yamazaki

Tetsuya Fujisawa

Masateru Koide

Toshiya Akamatsu

Ryuji Nomoto

Yoshitaka Aiba

Muneharu Morioka

Toyoji Sawada

Hideo Yamashita

Seiji Ueno

Masaaki Seki

Masaru Nukiwa

Yoshihiro Matsuoka

Noriaki Shiba

Takumi Ihara

Yoshikazu Inumaru

Masao Oshima

Yukihiro Kuriki

Masaki Uchida

A multi-chip module includes: a board; a wiring board disposed on the board and including a wiring pattern; and a plurality of chips disposed on the wiring board. Each of the plurality of chips is connected with at least one of the other chips, and the plurality of chips and the board are electrically connected with each other via a portion other than the wiring pattern of the wiring board.

Multi-chip module

A method of manufacturing a semiconductor device using a wiring substrate is provided which can facilitate the handling of the wiring substrate. The method includes the steps of forming a peelable resin layer on a silicon substrate, forming the wiring substrate on the peelable resin layer, mounting semiconductor chips on the wiring substrate, forming semiconductor devices by sealing the plurality of semiconductor chips by a sealing resin, individualizing the semiconductor devices by dicing the semiconductor devices from the sealing resin side but leaving the silicon substrate, peeling each of the individualized semiconductor devices from the silicon substrate between the silicon substrate and the peelable resin layer, and exposing terminals on the wiring substrate by forming openings through the peelable resin layer or by removing the peelable resin layer.

Semiconductor device and manufacturing method thereof

A wiring layer is provided on a semiconductor substrate and extends in a predetermined direction. An external connection electrode terminal is provided on the wiring layer through a plurality of column-shaped conductors. The column-shaped conductors are located under the external connection electrode terminal. A density of arrangement of the column-shaped conductors is varied according to a direction of extension of the wiring layer.

Semiconductor device

A manufacturing method of a semiconductor device incorporating a passive element includes the steps as follows: a redistribution board forming step forms a redistribution board incorporating the passive element on a base board; a semiconductor element mounting step mounts at least one semiconductor element formed on an opposite side surface of the redistribution board with regard to the base board; a base board separating step separates the base board from the redistribution board and exposes the other surface of the redistribution board; a redistribution board mounting step mounts the redistribution board on a package board via electrode pads exposed from the other surface of the redistribution board.

Manufacturing method of a semiconductor device incorporating a passive element and a redistribution board

In a method for mounting an electronic part on a mounting substrate in that projection electrodes provided on the electronic part are welded by fusion to join connection terminals provided on the mounting substrate, the flux paste includes a base flux and metal grains having diameters smaller than the diameters of projection electrodes and having a thickness so as to form a space between the flux paste and the electronic part when the electronic part is mounted on the mounting substrate and the flux paste is arranged on the mounting substrate. A resin is sealed in the space formed between the electronic part and the mounting substrate after the projection electrodes are joined to the connection terminals.

Method for mounting electronic part and paste material

A BGA semiconductor device includes a package substrate carrying thereon a semiconductor chip in a face-down state and a cap member covering the semiconductor chip on the package substrate, wherein the cap member has a optimized Young modulus smaller than about 20 GPa and a thermal conductivity exceeding about 100 W/(m&middot;K).

Flip-chip semiconductor device having an improved reliability

A semiconductor device including a semiconductor chip sealed with an encapsulating resin. Columnar electrodes are connected to electrode pads of the semiconductor chip, and extend through the encapsulating resin. The columnar electrodes are made from bonding wires and include enlarged outer ends. Solder balls are arranged on the surface of the encapsulating resin and connected to the outer ends of the columnar electrodes. In another example, pin wires are formed by half-cutting bonding wires, bonding one end of each of the bonding wires, and cutting the bonding wires at the half-cut portions.

Semiconductor device having columnar electrode and method of manufacturing same

A semiconductor device equipped with secondary pads having adequate arrangement for an arbitrary packaging process. The secondary pads are connected with the primary pads of the semiconductor device with a novel lead wire structure, which is characterized by its low electric resistance, good mechanical strength to protect active components of the device, good adhesion to bumps, and anti-electromigration property. The semiconductor device has: semiconductor circuit elements,embedded in a semiconductor substrate,; a plurality of conductive primary pads,each formed in a region above, and surrounding, the circuit element,; a first protective insulation substrate,covering the substrate and having first openings,for the primary pads,; lead wires,each consisting of a conductive bulk layer,made of copper and a metallic top layer,the bulk layer formed on the first protective insulation substrate,and having one end connected with a corresponding one of the primary pads,through an associated opening,and the other end located in a region surrounding the opening,, while the top layer made of a metal having Vickers hardness of more than 100; and a second protective insulation substrate,having second openings,for exposing the top surfaces of the other ends of the lead wires,serving as the secondary pads

Method for manufacturing semiconductor device with pad structure

A semiconductor device equipped with secondary pads having adequate arrangement for an arbitrary packaging process. The secondary pads are connected with the primary pads of the semiconductor device with a novel lead wire structure, which is characterized by its low electric resistance, good mechanical strength to protect active components of the device, good adhesion to bumps, and anti-electromigration property. The semiconductor device has: semiconductor circuit elements 2 embedded in a semiconductor substrate 1; a plurality of conductive primary pads 4 each formed in a region above, and surrounding, the circuit element 2; a first protective insulation substrate 5 covering the substrate and having first openings 6 for the primary pads 4; lead wires 7 each consisting of a conductive bulk layer 15 made of copper and a metallic top layer 16, the bulk layer formed on the first protective insulation substrate 5 and having one end connected with a corresponding one of the primary pads 4 through an associated opening 6 and the other end located in a region surrounding the opening 6, while the top layer made of a metal having Vickers hardness of more than 100; and a second protective insulation substrate 8 having second openings 9 for exposing the top surfaces of the other ends of the lead wires 7 serving as the secondary pads 17.

Semiconductor device with pad structure

An article under inspection is rotated at pre-set angular increments which total more than 360.degree., to divide the figure inscribed on the curved surface of the article into plural fractions. Selected picture fractions which discard redundant overlapping picture data, is synthesized into picture information indicative of one full-format picture based on which the figure inscribed on the curved surface of the article. Acceptability is determined automatically and quantitatively as compared to the conventional functional inspection and is performed without regard to the difference in skill from one operator to another. Recognizing the characters or symbols inscribed on the curved surface of the article under inspection one by one based on the information of the synthesized full-format picture, allows a comparison of the character string consisting of the recognized characters or symbols to a pre-set control character string.

Figure inspection method and apparatus

Growing community of inventors

Kawasaki, Japan

Kazuyuki Imamura