Nippon Telegraph and Telephone Corporation

Ntt Electronics Corporation

Kazuyoshi Nishimura

Jun Terada

Yusuke Ohtomo

Keiji Kishine

Hiroshi Koizumi

Tomoaki Kawamura

Masafumi Nogawa

Yoshikazu Urabe

Minoru Togashi

A comparator () outputs, out of an electrical signal input from a trans impedance amplifier (TIA) via a coupling capacitor, pulses having amplitudes equal to or larger than a reference value as a comparison output signal (Cout). An analog holding circuit () charges a holding capacitor with each pulse contained in the comparison output signal (Cout) and also removes a DC voltage obtained by the charging via a discharging resistor, thereby generating a holding output signal (Hout) that changes in accordance with the presence/absence of input of an optical signal. This allows to perform an autonomous operation without any necessity of an external control signal and properly detect the presence/absence of input of an optical signal.

Optical signal cutoff detection circuit and optical receiver

A recovered clock () is generated by making the phase of a reference clock () having the same frequency as the data rate frequency of input data () match the phase of the input data (). The input data () is written in a FIFO () using the recovered clock (). For readout from the FIFO (), the FIFO () is caused to output recovered data () using the reference clock () asynchronous to the recovered clock ().

CDR circuit

A clock/data recovery circuit includes a data duty correction circuit which outputs corrected data by correcting the duty of input data in accordance with the level of a correction signal, a clock recovery circuit which generates a recovered clock in synchronism with the edge timing of the corrected data, a data decision circuit which performs data decision of the corrected data based on the recovered clock, and a data duty detection circuit which detects the duty of the corrected data based on the recovered clock and outputs the correction signal representing a duty correction amount to the data duty correction circuit.

Clock/data recovery circuit

Growing community of inventors

Kanagawa, Japan

Kazuyoshi Nishimura