Renesas Electronics Corporation

Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Panasonic Corporation

Kazuyoshi Maekawa

Kenichi Mori

Kazuyuki Omori

Masahiro Matsumoto

Seiji Muranaka

Akihiko Ohsaki

Atsushi Ishii

Yoshifumi Takata

Masahiko Fujisawa

Yuichi Kawano

Yasuhiro Kanda

Akira Yajima

Noboru Sekiguchi

Junko Izumitani

Mitsuo Kimoto

Masakazu Hamada

Sumio Yamaguchi

Yuki Koyama

Performance of a semiconductor device is improved. In one embodiment, for example, deposition time is increased from 4.6 sec to 6.9 sec. In other words, in one embodiment, thickness of a tantalum nitride film is increased by increasing the deposition time. Specifically, in one embodiment, deposition time is increased such that a tantalum nitride film provided on the bottom of a connection hole to be coupled to a wide interconnection has a thickness within a range from 5 to 10 nm.

Semiconductor device having interconnection structure and method of manufacturing the same

Semiconductor device with copper interconnections

Semiconductor device with an interconnection layer and method of manufacturing the same

A bonding pad of a semiconductor chip in a QFP includes, in its exposed portion, a via disposition area comprising: a first segment that connects a corner and a first point; a second segment that connects the corner and a second point; and an arc that connects the first point and the second point and forms a convex shape toward the corner. Further, in a plan view of the bonding pad, at least a part of a via is disposed so as to overlap with the via disposition area.

Semiconductor device

The present invention makes it possible to improve the reliability of a semiconductor device. The semiconductor device has, over a semiconductor substrate, a pad electrode formed at the uppermost layer of a plurality of wiring layers, a surface protective film having an opening over the pad electrode, a redistribution line being formed over the surface protective film and having an upper surface and a side surface, a sidewall barrier film comprising an insulating film covering the side surface and exposing the upper surface of the redistribution line, and a cap metallic film covering the upper surface of the redistribution line. Then the upper surface and side surface of the redistribution line are covered with the cap metallic film or the sidewall barrier film and the cap metallic film and the sidewall barrier film have an overlapping section.

Semiconductor device and its manufacturing method

A semiconductor device includes: a pad electrodeformed in an uppermost layer of a plurality of wiring layers; a base insulating filmhaving an openingon the pad electrode; a base metal film UM formed on the base insulating film; a redistribution line RM formed on the base metal film UM; and a cap metal film CM formed so as to cover an upper surface and a side surface of the redistribution line RM. In addition, in a region outside the redistribution line RM, the base metal film UM made of a material different from that of the redistribution line RM and the cap metal film CM made of a material different from the redistribution line RM are formed between the cap metal film CM formed on the side surface of the redistribution line RM and the base insulating film, and the base metal film UM and the cap metal film CM are in direct contact with each other in the region outside the redistribution line RM.

Semiconductor device and manufacturing method thereof

Method of manufacturing semiconductor device including copper interconnections

Disclosed is a manufacturing method of a semiconductor device including a step of attaching semiconductor wafers together, in which it is prevented that the bonding strength between the attached semiconductor wafers may be decreased due to a void caused between the two semiconductor wafers. Moisture, etc., adsorbed to the surfaces of the semiconductor wafers is desorbed by performing a heat treatment on the semiconductor wafers after cleaning the surfaces thereof with pure water. Subsequently, after a plasma treatment is performed on the semiconductor wafers, the two semiconductor wafers are attached together. The wafers are firmly bonded together by subjecting to a high-temperature heat treatment.

Manufacturing method of back illumination CMOS image sensor device using wafer bonding

A semiconductor device in which reliability of a bonding pad to which a conductive wire is bonded is achieved. A bonding pad having an OPM structure is formed of an Al&#x2014;Cu alloy film having a Cu concentration of 2 wt % or more. By increasing the Cu concentration, the Al&#x2014;Cu alloy film forming the bonding pad is hardened. Therefore, the bonding pad is difficult to be deformed by impact in bonding of a Cu wire, and deformation of an OPM film as following the deformation of the bonding pad can be reduced. In this manner, concentration of a stress on the OPM film caused by the impact from the Cu wire can be reduced, and therefore, the breakage of the OPM film can be prevented.

Semiconductor device and method of manufacturing the same

A solid-state imaging element has problems of occurrence of dark current due to influences of an interface state at an interface between a semiconductor and an insulating film, e.g., between silicon and silicon oxide, and of charges generated in a device manufacturing process, which leads to signal noise, thereby degrading the function of a device, specifically, the imaging quality. The outline of the invention in the present application relates to a manufacturing method of a semiconductor integrated circuit device with a surface-irradiation type image sensor, which includes irradiating a main surface of a semiconductor wafer with photodiodes formed therein, with far-ultraviolet ray after forming a lowermost wiring layer of a multi-layer wiring and before forming a color filter layer, and then applying a heat treatment to the wafer.

Manufacturing method of semiconductor integrated circuit device

Semicondutor device with copper plugs having different resistance values

A semiconductor device includes an interlayer insulation film, an underlying line provided in the interlayer insulation film, a liner film overlying the interlayer insulation film, an interlayer insulation film overlying the liner film. The underlying line has a lower hole and the liner film and the interlayer insulation film have an upper hole communicating with the lower hole, and the lower hole is larger in diameter than the upper hole. The semiconductor device further includes a conductive film provided at an internal wall surface of the lower hole, a barrier metal provided along an internal wall surface of the upper hole, and a Cu film filling the upper and lower holes. The conductive film contains a substance identical to a substance of the barrier metal. A highly reliable semiconductor device can thus be obtained.

Semiconductor device with a line and method of fabrication thereof

Growing community of inventors

Tokyo, Japan

Kazuyoshi Maekawa