Hitachi, Ltd.

Nissan Motor Company Limited

Kazuyoshi Asada

Tadaaki Kitamura

Masao Takatoo

Masaoki Takaki

Keiji Hideshima

Yoshiki Kobayashi

Haruo Koyanagi

Yoshiyuki Okuyama

Hiroshi Takenaga

Haruki Inoue

Masakazu Yahiro

Isao Yasuda

Yoshiyuki Satoh

Kunio Nakanishi

Kuniyuki Kikuchi

Toshiro Shibata

Norio Tanaka

Takeshi Horie

Kunio Yamanaka

Katsuyuki Yamamoto

Hirokazu Sawano

Hiroharu Suda

Kotaro Hirasawa

Tadashi Fukushima

Takeshi Katoh

Shuuichi Miura

Hajime Yasuda

Kunihiko Ohnuma

Norio Murayama

Yoshiyuki Nihashi

Shuichi Senda

Atsutaro Kamei

An object recognition system using the image processing in which an area having a unique feature is extracted from an input image of an object, the unique image is registered in a shade template memory circuit as a shade template, the input image is searched for an image similar to the shade template registered by a shade pattern matching circuit, the position of an object is determined for each template, the speed and direction of movement of the object is determined from the positional information, and the results thereof are integrated by a separation/integration circuit, thereby recognizing the whole of the moving object.

Object recognition system and abnormality detection system using image

An information processing apparatus using a neural network learning function has, in one embodiment, a computer system and a pattern recognition apparatus associated with each other via a communication cable. The computer system includes a learning section having a first neural network and serves to adjust the weights of connection therein as a result of learning with a learning data signal supplied thereto from the pattern recognition apparatus via the communication cable. The pattern recognition apparatus includes an associative output section having a second neural network and receives data on the adjusted weights from the learning section via the communication cable to reconstruct the second neural network with the data on the adjusted weights. The pattern recognition apparatus with the associative output section having the reconstructed second neural network performs pattern recognition independently of the computer system with the communication cable being brought into an electrical isolation mode.

Information processing system using neural network learning function

An LSI parallel image processor in which line buffers and data-flow switching circuits each requiring a larger amount of hardware in the prior art are incorporated into an LSI circuit, the image data delayed by the line buffers is output from an image data output port, shift registers each having a variable number of steps for preserving local image regions are intermittently shifted-in in accordance with applied clocks, and the contents of the shift registers are sequentially read out.

Parallel image processor for performing local neighboring image

A data processor system is capable of operating in a first mode comprising a computer mode so as to carry out data processing functions and is also capable of operating in a second mode comprising a sequencer mode so as to carry out high speed sequence operations on the basis of programmed sequences. A high speed change between the computer and sequencer modes can freely be effected by executing mode change instructions so that the data processor system performs the duplex functions of a computer and a sequencer.

Data processor system capable of providing both a computer mode and a

Novel method and system for controlling input/output in a process control wherein state signals of object processes to be controlled are applied to a CPU via a process input/output unit and operated in the CPU in accordance with a logic programmed and stored in advance, and results of the operation are delivered out to the object processes to control the same. A buffer memory is interposed between the CPU and the process input/output unit. While reception and delivery of data are performed between the CPU or processor unit and the buffer memory, fetching of the state signals of the object processes or delivery of the process controlling signals is performed between the buffer memory and the object processes, thereby attaining a high rate processing as viewed from the overall processing of the system.

Method and system for controlling input/output in process control

A sequence control system includes a main memory unit for storing therein a sequence program, an operation and control unit for decoding the sequence instruction and executing the designated operations, an input unit for fetching states of a process to be controlled as inputs, and an output unit for producing an output signal to control the process.

Programmable sequence controller

A programmable sequence controller is provided with a display signal processor for preparing and correcting a sequence program in combination with a CRT (or cathode ray tube) display device. The signal processor simply effects signal processing of branch points and composition points in case where a so-called 'ladder diagram' constituting the sequence diagram with relay symbols is prepared and displayed. Branch information is stored in an FIFO (or first in first out) register. The branch information is sequentially received and stored, and the information thus stored is read out in the order of storage, thus preparing the ladder diagram. There are provided a register for instructing the FI operation and a register for instructing the FO operation. The sequence display controller is applicable to the cases where a new ladder diagram is to be prepared, the diagram once prepared is corrected, and the operation is checked.

Sequence display controlling method and controller

A sequence control system suitable for checking the operation of an information processor includes a process I/O unit for receiving input data from process inputs and providing output data to process outputs; a sequence processing unit for calculating data at the process outputs by performing sequence operations according to the sequence programs stored in a sequence program memory on the basis of the data at the process inputs; a buffer memory provided between the process I/O unit and the sequence processing unit for storing both the process input data from the process I/O unit and the output data from the sequence processing unit; a control arrangement for setting the input data to the buffer memory and for allowing access to a selected sequence program according to manually set input information; a display for displaying the selected sequence program accessed through the control arrangement; and a switch for interrupting the transfer of I/O data between the process I/O unit and the buffer memory. The sequence processing unit determines the output data on the basis of the input data stored in the buffer memory and applies the output data to the buffer memory. The control arrangement, in response to the manually set input information, causes the associated sequence program to be read from the sequence program memory and then the data of the inputs and outputs associated with the sequence program to be read from the buffer memory thereby to indicate them on the display.

Sequence control system

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Hitachi, Japan

Kazuyoshi Asada