Panasonic Corporation

Panasonic Holdings Corporation

Kazuya Toki

Michiaki Matsuo

Hideki Aoyagi

Hitoshi Asano

Suguru Fujita

Naoki Adachi

Taiji Akizuki

Takayuki Sotoyama

Tomoyuki Kinpara

An antenna wireless device includes: antenna elements; feed ports respectively corresponding to the antenna elements; one or more detection ports each corresponding to some or all of the plurality of antenna elements; transceiver circuits respectively connected to feed ports; and one or more reference transceiver circuits each connected to a corresponding one or more of the one or more detection ports. For each antenna element, the transceiver circuit processes a first signal to generate a second signal, the second signal fed to the feed port is output to the reference transceiver circuit through the detection port, the reference transceiver circuit processes the second signal to generate a third signal, and detects an amplitude and phase deviation based on the first signal and the third signal, and the transceiver circuit adjusts a phase and an amplitude of a transmission signal based on the amplitude and phase deviation.

Antenna wireless device

A received pulse signal based on an on-off keying modulation scheme is alternately sampled by AD conversion sections operated by a clock signal whose frequency is one-half of a transmission rate. In the synchronization, amounts of delay in sampling timing adjustment sections are made different from each other, whereby phases of two different points in a symbol pulse are sampled. An amount of delay in a variable delay section is adjusted in accordance with a result of comparison of the sampled values, thereby achieving synchronization. At the time of demodulation, the amount of delay in the variable delay section is held, and the amounts of delay in the sampling timing adjustment sections are switched to the same value, and the symbol pulse is alternately sampled. The sampled values are subjected to threshold value determination, and the determination result is subjected to parallel-to-serial conversion, whereby a demodulation output is acquired.

Pulse-sync demodulator

It is an object of the invention to provide a variable delay apparatus in which, even immediately after the delay amount of the variable delay apparatus is changed, a signal of a timing that is different from a set delay amount is not output. The variable delay apparatus of the invention includes: a variable delay blockhaving N (N is a natural number) delay elementsto, and N selectorsto; a variable delay blockhaving N delay elementsto, and N selectorsto; and a selector. After selection signalstoandtoare changed, and after an output timing of a delay amount set by the variable delay blocksis attained, the signal to be output is switched by the selector, thereby avoiding a situation where, immediately after the delay amount is changed, a signal of a timing that is different from the set delay amount is output as an output signal.

Variable delay apparatus

Growing community of inventors

Miyagi, Japan

Kazuya Toki