Kabushiki Kaisha Toshiba

Kazuya Ohuchi

Nobutoshi Aoki

Satoshi Matsuda

Ichiro Mizushima

Atsuhiro Kinoshita

Yoshinori Tsuchiya

Koichi Kato

Takashi Yamauchi

Junji Koga

Makoto Yoshimi

Hironobu Fukui

Atsushi Azuma

Hideki Shibata

Kiyotaka Miyano

Satoshi Inaba

Takamasa Usui

Makoto Wada

Akira Hokazono

Ryuji Ohba

Tomohisa Mizuno

Naoyuki Shigyo

Hiroyoshi Tanimoto

Akira Toriumi

Tetsunori Wada

It is made possible to reduce the interface resistance at the interface between the nickel silicide film and the silicon. A semiconductor manufacturing method includes: forming an impurity region on a silicon substrate, with impurities being introduced into the impurity region; depositing a Ni layer so as to cover the impurity region; changing the surface of the impurity region into a NiSilayer through annealing; forming a Ni layer on the NiSilayer; and silicidating the NiSilayer through annealing.

Semiconductor device and method of manufacturing the same

In one aspect of the present invention, a semiconductor device may include a semiconductor substrate, a silicide layer provided on the semiconductor substrate, a dielectric layer provided on the semiconductor substrate, a contact layer provided on the silicide layer, a metal layer provided in the dielectric layer and electrically connected to the silicide layer via the contact layer, a diffusion barrier layer provided between the dielectric layer and the metal layer, wherein the contact layer includes a first metal element provided in the metal layer, a second metal element provided in the diffusion barrier layer and at least one of a third metal provided in the silicide layer and Si element.

Semiconductor device including a silicide layer and a dielectric layer

Method of manufacturing silicide layer for semiconductor device

A method of manufacturing a semiconductor device includes implanting germanium ions into a selected portion of a semiconductor region containing at least silicon, forming P-type and N-type diffusion layers in the semiconductor region, and forming a suicide film which extends from the N type diffusion layer over to the boundary region and the P-type diffusion layer. A boundary region between the P-type and N-type diffusion layers is formed in the selected portion.

Method of manufacturing a semiconductor device having a silicide film

An aspect of the present invention includes a first conductive type semiconductor region formed in a semiconductor substrate, a gate electrode formed on the first conductive type semiconductor region, a channel region formed immediately below the gate electrode in the first conductive type semiconductor region, and a second conductive type first diffusion layers constituting source/drain regions formed at opposite sides of the channel region in the first conductive type semiconductor region, the gate electrode being formed of polycrystalline silicon-germanium, in which the germanium concentration of at least one of the source side and the drain side is higher than that of the central portion.

Method of manufacturing a semiconductor device having a gate electrode containing polycrystalline silicon-germanium

A semiconductor device includes a p-type well region, n-type diffusion regions formed in the surface region of the p-type well region, a gate electrode containing silicon and formed above the p-type well region with a gate insulating film disposed therebetween, and NiSi films formed in the surface regions of the n-type diffusion regions. In the semiconductor device, p-type impurity is doped in the depth direction from the surface of the NiSi film and the impurity profile of p-type impurity is so formed that a peak concentration of not lower than 1E20 cmwill be provided in a preset depth position of the NiSi film and the concentration in the interface between the NiSi film and the n-type diffusion region and the concentration in a position deeper than the interface will not be higher than 5E19 cm.

Semiconductor device having metal silicide films formed on source and drain regions and method for manufacturing the same

The present invention provides a semiconductor device, comprising a gate electrode of a stacked structure consisting of a polysilicon layer and a metal layer, a cap insulating film formed on the gate electrode, and a gate side wall film formed on the side wall of the gate electrode. The cap insulating film consists of an insulating film containing a silicon oxide-based layer and a silicon nitride layer and serves to protect the upper surface of the gate electrode. Further, the gate side wall film consists of an insulating film containing a silicon nitride film and a silicon oxide film and serves to protect the side surface of the gate electrode.

Semiconductor device having gate electrode of stacked structure including polysilicon layer and metal layer and method of manufacturing the same

A semiconductor device comprises: a semiconductor substrate; a gate insulating film formed on the top surface of the semiconductor substrate; a gate electrode formed on the gate insulating film; diffusion layers formed in the semiconductor substrate to be used a source layer and a drain layer; and a silicide layer formed to overlie the diffusion layers; wherein an oxygen concentration peak, where oxygen concentration is maximized, is at a level lower than said top surface in a cross-section taken along a plane perpendicular to said top surface.

Semiconductor device having an injection substance to knock against oxygen and manufacturing method of the same

An aspect of the present invention includes a first conductive type semiconductor region; a gate electrode formed on the first conductive type semiconductor region; a channel region formed immediately below the gate electrode in the first conductive type semiconductor region; and a second conductive type first diffusion layer constituting source/drain regions formed at opposite sides of the channel region in the first conductive type semiconductor region, the gate electrode being formed of polycrystalline silicon-germanium, in which a germanium concentration is continuously increased from a drain region side to a source region side, and an impurity concentration immediately below the gate electrode in the first conductive type semiconductor region being continuously increased from the source region side to the drain region side in accordance with the germanium concentration in the gate electrode.

A semiconductor device is disclosed. The device includes a semiconductor region and P-type and N-type diffusion layers formed in the semiconductor region. The semiconductor region includes a germanium low-concentration region containing germanium of low concentration and a germanium high-concentration region containing germanium of high concentration. A boundary region between the P-type and N-type diffusion layers lies in the germanium high-concentration region. A silicide film is formed to extend from the P-type diffusion layer over to the boundary region and the N-type diffusion layer.

A gate electrode of an n-channel IGFET includes a first region composed of at least a first IV group element and a second IV group element which are different from each other, and a second region composed of the first IV group element. Similarly, a gate electrode of a p-channel IGFET includes first and second regions. For example, the first region is made of SiGe while the second region is made of Si. In both of the n-channel and P-channel IGFET, silicide electrodes are formed on the gate electrodes N and P through silicidation of at least parts of the second regions.

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Yokohama, Japan

Kazuya Ohuchi