Canon Kabushiki Kaisha

Kazuya Notsu

Nobuhiko Sato

Tadashi Kosaka

Shoji Nishida

Hajime Ikeda

Koichi Shimizu

Shuichi Chiba

Hisatane Komori

Yu Katase

Kiyofumi Sakaguchi

Takanori Suzuki

Koji Tsuduki

Satoru Hamasaki

Shin Hasegawa

Ichiro Kataoka

Osamu Hamamoto

Koji Tamura

Kunihiko Minegishi

Fujio Ito

Yasuhiro Matsuki

Yasushi Kurihara

Ayako Furesawa

Kunihiro Abe

Ikuto Kimura

Yoshifumi Murakami

Ryuji Oyama

A package comprising a base is provided. An electrode and a concave portion are arranged on a first surface of the package. The base comprises a second surface on a side opposite to the first surface and a third surface. The first surface is positioned between the second and third surfaces. The electrode comprises an electrode upper surface and an electrode side surface. The concave portion comprises a concave side surface and a bottom surface positioned closer to the second surface than the concave side surface. The electrode upper surface is arranged at a position further away from the virtual plane than the bottom surface. The electrode side surface is continuous with the concave side surface. The concave portion further comprises a second side surface which faces the concave side surface and is continuous with the third surface.

Package and semiconductor device

Provided is an electronic device that suppresses an increase in internal pressure while suppressing entry of a foreign material. An electronic module according to the present embodiment has an electronic device, a substrate, a frame, and a cover, a hole portion having a first opening in a first main surface and a second opening in a second main surface and communicating the internal space and the external space, and a component is disposed to face the second opening.

Electronic module and imaging system

According to the disclosure, a relationship of Tgp&#x3e;Tgf, &#x3b1;f1&#x3c;&#x3b1;PCB1, and (Tgp&#x2212;To)&#xd7;&#x3b1;PCB1&#x3c;(Tgf&#x2212;To)&#xd7;&#x3b1;f1+(Tgp&#x2212;Tgf)&#xd7;&#x3b1;f2 or a relationship of Tgp&#x3c;Tgf, &#x3b1;PCB1&#x3c;&#x3b1;f1, and (Tgf&#x2212;To)&#xd7;&#x3b1;f1&#x3c;(Tgp&#x2212;To)&#xd7;&#x3b1;PCB1+(Tgf&#x2212;Tgp)&#xd7;&#x3b1;PCB2 is satisfied, where linear expansion coefficients in an in-plane direction of the substrate at a temperature below a glass transition temperature Tgp of the substrate and at a temperature above the glass transition temperature Tgp of the substrate are denoted as &#x3b1;PCB1 and &#x3b1;PCB2, respectively, linear expansion coefficient of the frame at a temperature below a glass transition temperature Tgf of the frame and at a temperature above the glass transition temperature Tgf of the frame are denoted as &#x3b1;f1 and &#x3b1;f2, respectively, and a room temperature is denoted as To.

Imaging device module, imaging system, imaging device package, and manufacturing method

The method of the invention includes: placing a base member and a frame member having a thermal expansion coefficient different from a thermal expansion coefficient of the base member in a state in which the base member is stacked with the frame member and a thermosetting adhesive agent is interposed between the base member and the frame member; adhering the base member and the frame member by heating the base member, the frame member, and the adhesive agent from the state to a temperature equal to or higher than a curing temperature of the adhesive agent; and cooling the base member and the frame member from the curing temperature. The frame member in the state is warped so that a flatness error of the frame member after having been cooled becomes smaller than that in a case where the frame member is flat in the state.

Method of manufacturing mounting member and method of manufacturing electronic component

An optical member includes a first region and a second region constituting an interface with an adhesive member. The first region is disposed outside the second region in a second direction intersecting a first direction. An adhesive force generated at an interface between the first region and the adhesive member is smaller than an adhesive force generated at an interface between the second region and the adhesive member.

Electronic component including an optical member fixed with adhesive

Provided is an electronic component including: a base member; an electronic device fixed on the base member; and a lid member arranged over the electronic device and fixed on the base member. A primary material of the lid member is a crystal quartz, the lid member has two primary faces opposing to the electronic device and four side faces, and each of the four side faces is a wet-etched face that is not parallel to an optical axis of the crystal quartz.

Electronic component, manufacturing method of electronic component, and electronic equipment

A mounting member includes a plurality of internal connecting portions, each of which is electrically connected to an electronic device, and a plurality of external connecting portions, each of which is soldered, wherein the plurality of external connecting portions include a first connecting portion in communication with at least any of the plurality of internal connecting portions, and a second connecting portion different from the first connecting portion, and surfaces of the first connecting portion and the second connecting portion include gold layers, and a thickness of the gold layer of the second connecting portion is smaller than a thickness of the gold layer of the first connecting portion.

Mounting member, electronic component, and method for manufacturing module

A package includes a base body to which an electronic device is fixed, a lid body that faces the electronic device, and a frame body that encloses at least one of a space between the electronic device and the lid body, and the electronic device. The frame body has a first portion located at a side of an inner edge of the frame body with respect to an outer edge of the base body, and a second portion located at a side of an outer edge of the frame body with respect to the outer edge of the base body, in an X direction from the inner edge of the frame body toward the outer edge of the frame body.

Electronic component and electronic apparatus

An SiGe layer is grown on a silicon substrate. The SiGe layer or the silicon substrate and SiGe layer are porosified by anodizing the SiGe layer to form a strain inducing porous layer or a porous silicon layer and strain inducing porous layer. An SiGe layer and strained silicon layer are formed on the resultant structure. The SiGe layer in the stacking growth step only needs to be on the uppermost surface of the porous layer. For this reason, an SiGe layer with a low defect density and high concentration can be formed. Since the SiGe layer on the strain inducing porous layer can achieve a low defect density without lattice mismatching. Hence, a high-quality semiconductor substrate having a high strained silicon layer can be obtained.

Semiconductor member, manufacturing method thereof, and semiconductor device

A method of manufacturing a semiconductor substrate includes a growing step of growing a second single crystalline semiconductor on a first single crystalline semiconductor, a blocking layer forming step of forming a blocking layer on the second single crystalline semiconductor, and a relaxing step of generating crystal defects at a portion deeper than the blocking layer to relax a stress acting on the second single crystalline semiconductor. The blocking layer includes, e.g., a porous layer, and prevents the crystal defects at the portion deeper than the blocking layer from propagating to the surface of the second single crystalline semiconductor.

Semiconductor substrate and manufacturing method for the same

An SiGe layer is grown on a silicon substrate. The SiGe layer or the silicon substrate and SiGe layer are porosified by anodizing the SiGe layer to form a strain induction porous layer or a porous silicon layer and strain induction porous layer. An SiGe layer and strained silicon layer are formed on the resultant structure. The SiGe layer in the stacking growth step only needs to be on the uppermost surface of the porous layer. For this reason, an SiGe layer with a low defect density and high concentration can be formed. Since the SiGe layer on the strain induction porous layer can achieve a low defect density without lattice mismatching. Hence, a high-quality semiconductor substrate having a high strained silicon layer can be obtained.

This invention provides an SOI substrate manufacturing method using a transfer method (bonding and separation). A separation layer () is formed on a silicon substrate (). A silicon layer (), SiGe layer (), silicon layer ('), and insulating layer () are sequentially formed on the resultant structure to prepare a first substrate (&#x2032;). This first substrate (&#x2032;) is bonded to a second substrate (). The bonded substrate stack is separated into two parts at the separation layer (). Next, Ge in the SiGe layer () is diffused into the silicon layer () by hydrogen annealing. With this process, a strained SOI substrate having the SiGe layer on the insulating layer () and a strained silicon layer on the SiGe layer is obtained.

Semiconductor member manufacturing method and semiconductor device manufacturing method

This invention provides an SOI substrate manufacturing method using a transfer method (bonding and separation). A separation layer ( ) is formed on a silicon substrate ( ). A silicon layer ( ), SiGe layer ( ), silicon layer ( ), and insulating layer ( ) are sequentially formed on the resultant structure to prepare a first substrate ( ). This first substrate ( ) is bonded to a second substrate ( ). The bonded substrate stack is separated into two parts at the separation layer ( ). Next, Ge in the SiGe layer ( ) is diffused into the silicon layer ( ) by hydrogen annealing. With this process, a strained SOI substrate having the SiGe layer on the insulating layer ( ) and a strained silicon layer on the SiGe layer is obtained.

Growing community of inventors

Yokohama, Japan

Kazuya Notsu