Renesas Electronics Corporation

Renesas Technology Corp.

Mitsubishi Denki Kabushiki Kaisha

Kazushi Kono

Takeshi Iwamoto

Toshiaki Yonezu

Shigeki Obayashi

Masashi Arakawa

Hisayuki Kato

Yasuhiro Ido

Takahiro Uchida

A semiconductor device is provided which includes an interlayer dielectric formed on a semiconductor substrate, a first insulating layer, having a trench, formed on the interlayer dielectric, a barrier film formed on side and bottom surfaces of the first trench, an electric fuse formed on the barrier film, a second insulating layer formed to directly contact the electric fuse, and a third insulating layer formed on the second insulating layer. A linear expansion coefficient of the electric fuse is greater than a linear expansion coefficient of the first insulating layer and the second insulating layer, and a melting point of the barrier film is greater than a melting point of the electric fuse.

Semiconductor device and a method of increasing a resistance value of an electric fuse

A semiconductor device having an electric fuse structure which receives an electric current to permit the electric fuse to be cut without damaging portions around the fuse. The electric fuse can be electrically connected between an electronic circuit and a redundant circuit as a spare of the electronic circuit. After these circuits are sealed with a resin, the fuse can be cut by receiving the electric current from the outside. The electric fuse is formed in a fine layer, and is made of a main wiring and a barrier film. The linear expansion coefficient of each of the main wiring and the barrier film is larger than that of each of the insulator layers. The melting point of each of the main wiring and the barrier film is lower than that of each of the insulator layers.

Semiconductor device and a method increasing a resistance value of an electric fuse

A semiconductor integrated circuit which can perform reliable relief processing using an electric fuse. The semiconductor integrated circuit includes a fuse wiring, a first electrode pad, a second electrode pad, a pollution-control layer, and a first via hole wiring and a second via hole wiring. The fuse wiring is cut by current exceeding a predetermined value. A first electrode pad is connected to one side of a fuse wiring, a second electrode pad is connected to the other of a fuse wiring, a pollution-control layer is formed in the upper layer and the lower layer of the fuse wiring via an insulating layer. In the fuse wiring, second via hole wiring of a pair is formed in the outside of a first via hole wiring so that the first the via hole wiring is surrounded.

Semiconductor integrated circuit

The semiconductor device which has an electric straight line-like fuse with a small occupying area is offered. A plurality of projecting portionsare formed in the position shifted from the middle position of electric fuse part, and, more concretely, are formed in the position distant from viaand near via. A plurality of projecting portionsare formed in the position shifted from the middle position of electric fuse part, and, more concretely, are formed in the position distant from viaand near. That is, projecting portionsand projecting portionsare arranged in the shape of zigzag.

Semiconductor device

In fuse program circuits, fuse element FS is implemented using metal interconnect at third or higher layer of multilayer metal interconnect. In each fuse program circuit, program information and fuse select information are sequentially transferred using a scan flip-flops, and fuses are selectively and electrically blown one by one. The fuse program circuit provided with fuse elements that can be programmed even after packaging is implemented with low power consumption and a low occupation area.

Semiconductor device having electrical fuses with less power consumption and interconnection arrangement

Provided is a semiconductor device having an electric fuse structure which receives the supply of an electric current to be permitted to be cut without damaging portions around the fuse. An electric fuse is electrically connected between an electronic circuit and a redundant circuit as a spare of the electronic circuit. After these circuits are sealed with a resin, the fuse can be cut by receiving the supply of an electric current from the outside. The electric fuse is formed in a fine layer, and is made of a main wiring and a barrier film. The linear expansion coefficient of each of the main wiring and the barrier film is larger than that of each of the insulator layers. The melting point of each of the main wiring and the barrier film is lower than that of each of the insulator layers.

A fuse includes a fuse portion laid in such a manner that the direction of each turn of the fuse portion is parallel to the direction in which pads are arranged. The distance between the pads and the fuse portion is defined as the distance between the side of a pad facing the fuse portion and the pad nearest to the turn facing the particular side. The distance between the turn of the fuse portion and the nearest pad is the distance between the pads and the fuse portion. The pads and the fuse portion are distant from each other by a length at least ten times the width of the fuse.

Semiconductor device and fuse blowout method

On a semiconductor substrate a silicon oxide film is formed and provided with a recess. In the recess a reflector layer of copper is disposed as a blocking layer with a barrier metal posed therebetween. The reflector layer of copper is covered with a silicon oxide film and thereon a fuse region provided with a plurality of fuses is provided. The reflector layer of copper has a plane of reflection recessed downward to reflect a laser beam. The reflector layer of copper is arranged to overlap substantially the entirety of the fuse region, as seen in a plane. A laser beam radiated to blow the fuse can have a reduced effect on a vicinity of the fuse region. A semiconductor device reduced in size can be obtained.

A semiconductor device includes an alignment mark arranged on a surface, and including a high reflectance portion and a flat low reflectance portion; and a first silicon oxide film formed internally and provided with a plurality of first embedded portions filled with a material different from a material of portions around the embedded portions. The first embedded portions are formed in at least a portion of a region avoiding a portion shaded by projecting the high reflectance portion onto the silicon oxide film.

Semiconductor device with alignment mark

A semiconductor integrated circuit according to the invention includes a wiring member formed on a main face of a semiconductor substrate, a fusing member connected to the wiring member and having a predetermined thickness, a barrier member for covering a bottom face and a side face of the fusing member, a light absorbing member for covering at least a side face portion of the barrier member for covering the fusing member, and an insulating member for embedding the wiring member, the fusing member, the barrier member and the light absorbing member. A complex permittivity of the light absorbing member is provided with a real part smaller than that of the fusing member in absolute value and an imaginary part larger than that of the fusing member.

Growing community of inventors

Tokyo, Japan

Kazushi Kono