Other

National Institute of Advanced Industrial Science and Technology

Nippon Precision Circuits Inc.

Seiko Npc Corporation

Tarui, Yasuo

Kazuo Sakamaki

Shigeki Sakai

Yasuo Tarui

To provide a semiconductor nonvolatile storage device capable of applying distributed voltage efficiently to a ferroelectric capacitor in a semiconductor nonvolatile storage device having an MFMIS structure without enlarging a memory cell area and a method of fabricating the same, a ferroelectric nonvolatile storage element is constructed by a structure successively laminated with a first insulator layer (), a first conductor layer (), a ferroelectric layer () and a second conductor layer () on a channel region and is constructed by a structure having a third conductor () and a fourth conductor () respectively laminated on a source region and a drain region, in which the third conductor () and the fourth conductor () are opposed to each other via the first conductor layer () and a second insulator thin film ().

Semiconductor nonvolatile storage element and method of fabricating the same

A ferroelectric non-volatile memory device that allows the coupling ratio to be increased and the effect of voltage distribution to the ferroelectric capacitor to be improved without increasing the area of the gate electrode of a detection MIS field effect transistor is provided. In a memory cell structure, a semiconductor including regions for a source, a channel, and a drain, a gate insulator on the channel region, a floating gate conductor, a ferroelectrics, and an upper electrode conductor are layered in this order. The structure includes a paraelectric capacitor having one end connected to the floating gate conductor and the other end connected to the source region.

Ferroelectric non-volatile memory device having integral capacitor and gate electrode, and driving method of a ferroelectric non-volatile memory device

A transistor-type ferroelectric nonvolatile memory element having an MFMIS (metal-ferroelectric-metal-insulator-semiconductor) structure that can be highly densely integrated. The MFMIS transistor has a constitution in which the MFM (metal-ferroelectric-metal) structure and the MIS (metal-insulator-semiconductor) structure are stacked up and down on nearly the same area, and the lower MIS structure has means for increasing the effective area of the MIS capacitance. Means for increasing the effective area of the capacitor is a trench in the semiconductor substrate, ruggedness in the MIS structure or a MIN (metal-insulator-metal) structure.

Transistor-type ferroelectric nonvolatile memory element

To provide a semiconductor nonvolatile storage device capable of applying distributed voltage efficiently to a ferroelectric capacitor in a semiconductor nonvolatile storage device having an MFMIS structure without enlarging a memory cell area and a method of fabricating the same, a ferroelectric nonvolatile storage element is constructed by a structure successively laminated with a first insulator layer ( ), a first conductor layer ( ), a ferroelectric layer ( ) and a second conductor layer ( ) on a channel region and is constructed by a structure having a third conductor ( ) and a fourth conductor ( ) respectively laminated on a source region and a drain region, in which the third conductor ( ) and the fourth conductor ( ) are opposed to each other via the first conductor layer ( ) and a second insulator thin film ( ).

A ferroelectric body transistor having a structure of MFMIS (conductor film) -ferroelectric film-conductor film-insulating film-semiconductor) including a gate insulator capacitor having an MIS structure, a low dielectric constant layer restraining layer interposed between an insulating film made of a material having a high inductive capacity of CeO and a semiconductor substrate to thereby restrain a low dielectric constant layer of SiO or the like from being produced at an interface between the insulating film and the semiconductor substrate and restrain a capacitance from being reduced. An area of the gate insulator capacitor can be reduced and highly integrated formation is provided.

Transistor type ferroelectric body nonvolatile storage element

Ferroelectric memory element having an MFIS structure including a silicon semiconductor substrate and an insulating film arranged above the silicon semiconductor substrate. The insulating film includes a low dielectric constant layer restraining film and a mutual diffusion preventive film so that an unnecessary, low dielectric constant layer is prevented from forming between the semiconductor substrate and the insulating film. A ferroelectric film is arranged on the insulating film. The low dielectric constant layer restraining film is thinner than the ferroelectric film.

Growing community of inventors

Tokyo, Japan

Kazuo Sakamaki