Semiconductor Components Industries, LLC

Sanyo Electric Co., Ltd.

Sanyo Semiconductor Co., Ltd.

Kazuo Okada

Takashi Noma

Hiroshi Yamada

Hiroyuki Shinogi

Katsuhiko Kitagawa

Shinzo Ishibe

Yuichi Morita

Noboru Okubo

Yusheng Lin

Hideaki Yoshimi

Shigeki Otsuka

Michael John Seddon

Mitsuru Okigawa

Yoshinori Seki

Hideyuki Inotsume

Katsuhiko Iizuka

Naoyuki Yomoda

Toshimitsu Taniguchi

Hiroyuki Suzuki

Masanori Iida

Kimihide Saito

Tomonori Mori

Hiroyuki Dobashi

Takayoshi Honda

Masaji Hara

Ryo Kawai

Yoichi Kanuma

Shunsuke Yasuda

Implementations of semiconductor devices may include a die having a first side and a second side, a contact pad coupled to the first side of the die, and a metal layer coupled to the second side of the die. A thickness of the die may be no more than four times a thickness of the metal layer.

Semiconductor device with backmetal and related methods

A method for making an integrated passive device (IPD) die includes grinding a backside of a semiconductor substrate to reduce a thickness of a central portion of the semiconductor substrate while leaving a mechanical support ring on an outer portion of the substrate, and forming a through-substrate via (TSV) from the backside of the substrate. The TSV defines interconnect access to at least one passive component embedded in an insulator material disposed on a front surface of the semiconductor substrate. The substrate has a thickness less than three-quarters of an original thickness of the substrate.

Integrated passive device and fabrication method using a last through-substrate via

According to an aspect, a semiconductor device for integrating multiple transistors includes a wafer substrate including a first region and a second region. The first region defines at least a portion of at least one first transistor. The second region defines at least a portion of at least one second transistor. The semiconductor device includes an isolation area located between the first region and the second region, at least one terminal of the at least one first transistor contacting the first region of the wafer substrate, at least one terminal of the at least one second transistor contacting the second region of the wafer substrate, and an encapsulation material, where the encapsulation material includes a portion located within the isolation area.

Isolation in a semiconductor device

In one general aspect, an integrated passive device (IPD) die includes at least one passive component that is embedded in an insulator material disposed on a front surface of a substrate. The IPD die includes a through-substrate via (TSV) extending from the backside of the substrate toward the front surface of the substrate. The TSV defines interconnect access to at least one passive component embedded in the insulator material disposed on the front surface of the substrate. The substrate has a thickness less than three-quarters of an original thickness of the substrate.

An object of the invention is to provide a smaller semiconductor device of which the manufacturing process is simplified and the manufacturing cost is reduced and a method of manufacturing the same. Furthermore, an object of the invention is to provide a semiconductor device having a cavity. A first supporting bodyhaving a penetration holepenetrating it from the front surface to the back surface is attached to a front surface of a semiconductor substratewith an adhesive layerbeing interposed therebetween. A device elementand wiring layersare formed on the front surface of the semiconductor substrate. A second supporting bodyis attached to the first supporting bodywith an adhesive layerbeing interposed therebetween so as to cover the penetration hole. The device elementis sealed in a cavitysurrounded by the semiconductor substrate, the first supporting bodyand the second supporting body

Semiconductor device and method of manufacturing the same

A packaged semiconductor device is manufactured by a simplified manufacturing process, and is reduced in cost, in thickness and in size. A device component and a pad electrode connected with the device component are formed on a semiconductor substrate. A supporter is bonded to a top surface of the semiconductor substrate through an adhesive layer. Then, there is formed a protection layer that has an opening at a location corresponding to the pad electrode and covers a side surface and a back surface of the semiconductor substrate. A conductive terminal is formed on the pad electrode at the location corresponding to the opening formed in the protection layer. No wiring layer or conductive terminal is formed on the back surface of the semiconductor substrate. A conductive terminal is formed on a periphery of the supporter outside of and next to the side surface of the semiconductor substrate.

Semiconductor device and manufacturing method thereof

An object of the invention is to provide a smaller semiconductor device of which the manufacturing process is simplified and the manufacturing cost is reduced. Furthermore, an object of the invention is to provide a semiconductor device having a cavity. A device elementis formed on a front surface of a semiconductor substrateand a sealing bodyis attached to the semiconductor substratewith an adhesive layerbeing interposed therebetween. A main surface (a back surface) of the sealing bodywhich faces the semiconductor substrateis curved inward, and there is a given space (a cavity) between the sealing bodyand the semiconductor substrateSince the back surface of the sealing bodyis curved, the sealing bodyis used as a planoconcave lens (a reverse direction) as well as a sealing member for the device element

Semiconductor device

This invention is directed to offer a semiconductor device in which a cavity space is easily provided in a specific region when a supporting member is bonded to a semiconductor substrate through an adhesive layer, and its manufacturing method. A resist layer is applied to an entire top surface of the semiconductor substrate, and exposure to transfer a pattern is performed. By subsequent development and selective removal of the resist layer, the resist layer is formed into a shape of a plurality of columnar structures. Then, an adhesive material made of an epoxy resin or the like is applied to the entire top surface of the semiconductor substrate. The adhesive material is gathered around the columnar structuresby itself to form an adhesive layer. Therefore, in contrast, the adhesive layerdoes not deposit in a region where the cavity is to be formed. Then, the supporting memberis bonded through the columnar structuresand the adhesive layer. By bonding the supporting member, there is formed the cavitysurrounded with the semiconductor substrate, the columnar structuresand the supporting member

This invention is directed to offer a package type semiconductor device that can realize a smaller size device and its manufacturing method as well as a small stacked layer type semiconductor device and its manufacturing method. A device componentand a pad electrodeelectrically connected with the device componentare formed on a semiconductor substrate. A supporting memberis bonded to a surface of the semiconductor substratethrough an adhesive layer. There is formed a through-holein the supporting memberpenetrating from its top surface to a back surface. Electrical connection with another device is made possible through the through-hole. A depressed portionis formed in a partial region of the top surface of the supporting member. Therefore, all or a portion of another device or a component can be disposed utilizing a space in the depressed portion. When a stacked layer type semiconductor device is formed, stacking is made by fitting a portion of a semiconductor devicein an upper layer to an inside of the depressed portion

The invention provides a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an output image. A reflection layer is formed between a light receiving element and a wiring layer, that reflects an infrared ray toward a light receiving element the without transmitting it to the wiring layer, the infrared ray entering from a light transparent substrate toward the wiring layer through a semiconductor substrate. The reflection layer is formed at least in a region under the light receiving element uniformly or only under the light receiving element. Alternatively, an anti-reflection layer having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed instead of the reflection layer.

The invention enhances moisture resistance between a supporting body and an adhesive layer to enhance the reliability of a semiconductor device. A semiconductor device of the invention has a first insulation film formed on a semiconductor element, a first wiring formed on the first insulation film, a supporting body formed on the semiconductor element with an adhesive layer being interposed therebetween, a third insulation film covering the back surface of the semiconductor element onto the side surface thereof and the side surface of the adhesive layer, a second wiring connected to the first wiring and extending onto the back surface of the semiconductor element with the third insulation film being interposed therebetween, and a protection film formed on the second wiring.

This invention provides a semiconductor device that solves a problem that a pattern of a wiring formed on a back surface of a semiconductor substrate is reflected on an output image. A light receiving element (e.g. a CCD, an infrared ray sensor, a CMOS sensor, or an illumination sensor) is formed on a front surface of a semiconductor substrate, and a plurality of ball-shaped conductive terminals is disposed on a back surface of the semiconductor substrate. Each of the conductive terminals is electrically connected to a pad electrode on the front surface of the semiconductor substrate through a wiring layer. The wiring layer and the conductive terminal are formed on the back surface of the semiconductor substrate except in a region overlapping the light receiving element in a vertical direction, and are not disposed in a region overlapping the light receiving element.

Semiconductor device and manufacturing method of the same

The invention is directed to providing a package type semiconductor device with high reliability and smaller size and a method of manufacturing the same. A semiconductor substrate formed with a device element and a pad electrode on its front surface is prepared. The semiconductor substrate is then selectively etched from its back surface to form an opening. A second insulation film is then formed covering the side and back surfaces of the semiconductor substrate. First and second insulation films on the bottom of the opening are then selectively removed to expose a portion of the pad electrode. A wiring layer is then formed along the side surface of the semiconductor substrate, being electrically connected with the exposed pad electrode. An electrode connect layer is then formed covering the wiring layer. A protection layer is then formed covering the back surface of the semiconductor substrate and having an opening in a region for formation of a sidewall electrode. Then, the sidewall electrode is formed in a region exposed by the opening of the protection layer.

The invention is directed to improvement of reliability of a chip size package type semiconductor device in a manufacturing method thereof. A support body is formed on a front surface of a semiconductor substrate with a first insulation film therebetween. Then, a part of the semiconductor substrate is selectively etched from its back surface to form an opening, and then a second insulation film is formed on the back surface. Next, the first insulation film and the second insulation film at a bottom of the opening are selectively etched, to expose pad electrodes at the bottom of the opening. Then, a third resist layer is selectively formed on a second insulation film at boundaries between sidewalls and the bottom of the opening on the back surface of the semiconductor substrate. Furthermore, a wiring layer electrically connected with the pad electrodes at the bottom of the opening and extending onto the back surface of the semiconductor substrate is selectively formed corresponding to a predetermined pattern.

Growing community of inventors

Ota, Japan

Kazuo Okada