Nec Corporation

Nec Electronics Corporation

Nippon Electric Co., Ltd.

Kazuo Miwada

Shiro Tsunai

Hiroaki Itoh

A charge transfer device is disclosed wherein three pixel rows are arranged adjacently to each other. First to third pixel rows are arranged adjacently to each other, and the charge transfer device includes a first charge transfer element for reading out and transferring signal charges generated in the first pixel row and a second charge transfer element for reading out and transferring signal charges generated in the second and third pixel rows. Second readout electrodes for reading out signal charges generated in the second pixel row into the second charge transfer element are provided with one electrode placed between adjacent pixels of the third pixel row.

Charge transfer device having three pixel rows arranged adjacently to each other

A color linear image sensor apparatus includes a wiring conductor formed of a first level polysilicon film which is provided on a channel stopper in photocell arrays and which is connected to a first transfer gate electrode of a CCD register. The first transfer gate electrode is also connected to a second transfer gate electrode through a contact hole. Thus, even if the wiring conductor is formed on the channel stopper in the photocell array, a dead zone for locating a wiring conductor for the driving clocks becomes unnecessary, and accordingly, the distance between photocell arrays can be shortened to two thirds to a half of the distance in the conventional examples.

Color linear image sensor having a reduced distance between photosensor

A charge transfer device having an improved signal stage is disclosed. This stage includes a floating region formed in a semiconductor layer and receiving signal charges from a charge transfer stage, a reset drain region formed in the semiconductor layer adjacently to the floating region, a reset gate for resetting the floating drain region in potential to the reset drain region, an absorption region formed in the semiconductor layer adjacently to the reset drain region, a barrier gate supplied with a constant voltage to form a channel region between reset drain region and the adsorption region, and a charge injection source connected to the reset drain region to inject charges thereinto.

Charge transfer device having charge injection source for reset drain

A CCD linear image sensor comprises an array of linearly arranged photosensor cells, and a pair of CCD shift registers respectively arranged on both sides of the array of linearly arranged photosensor cells. The CCD shift registers are coupled in parallel to the linearly arranged photosensor cell array so as to read out signal charges from predetermined photosensor cells of the linearly arranged photosensor cell array and to transfer the read-out signal charge serially in the CCD shifter register. An output end of each CCD shift register is branched into a pair of CCD shift register transfer paths. An output circuit is connected to an output terminal of each of the branched CCD shift register transfer paths.

CCD linear image sensor including a CCD shift register on both sides of

A charge transfer device in which a charge transfer section, an output gate, a floating diffused region, a reset gate electrode, a reset drain region, a barrier gate electrode and an absorption drain region are provided in semiconductor substrate. The reset drain region for resetting or draining charges in the floating diffused region is connected via a capacitor to a constant potential terminal. The absorption drain region is provided with a voltage booster for raising the amplitude of the transfer pulse to a level higher than the power source voltage. The output voltage of the voltage booster is supplied to the absorption drain region. The channel potential beneath the barrier gate electrode is set lower than that beneath the reset gate electrode.

Charge transfer device provided with improved output structure

A charge coupled device transfers a charge packet to a floating diffusion region for producing voltage variation therein, and the voltage variation is relayed to an output terminal by means of a driving unit implemented by a plurality of source follower circuits coupled in cascade, wherein each of the second to final source follower circuits is implemented by a series combination of an enhancement type driving transistor and an enhancement type load transistor, and the enhancement type load transistor changes the channel conductance thereof complementary to the enhancement type driving transistor under the control of a control unit so as to improve the dynamic range of the output signal thereof without sacrifice of the sensitivity of the floating diffusion region.

Charge transfer device equipped with charge signal detector improved in

A floating diffusion type signal charge detection circuit for use in a charge transfer device includes a charge transfer region formed in a semiconductor layer, a plurality of transfer electrodes formed on the charge transfer region through an insulating layer, a floating diffusion formed in the semiconductor layer adjacent to a final stage of the charge transfer region, a reset drain formed in the semiconductor layer separate from the floating diffusion and connected to a reset drain voltage, and a reset gate formed through an insulating layer on a portion of the semiconductor layer between the floating diffusion and the reset drain. The floating diffusion, the reset drain and the reset gate forms a reset transistor. An amplifier is connected at its input to the floating diffusion so as to detect a voltage change appearing in the floating diffusion. The amplifier includes a first amplification stage having a first MOS transistor having a gate connected to the floating diffusion and a drain connected to a high voltage, a source of the first MOS transistor being connected to a first load so that a first source follower is formed, and a second amplification stage having an input connected to the source of the first MOS transistor and an output node connected to an output terminal. An output control circuit is connected to the first MOS transistor and controlled in synchronism with a reset pulse applied to the reset gate so that when the reset transistor is off, the first source follower outputs an signal having a level higher than that outputted from the first source follower when the reset transistor were on.

Floating diffusion type charge detection circuit for use in charge

A charge transfer device is equipped with a junction type field effect transistor coupled with the final stage of a transfer shift register for modulating current flowing therethrough depending upon the amount of electric charge from the transfer shift register, and the junction type field effect transistor comprises an n-type looped gate region formed in a p-type well, a p-type source region surrounded by the looped gate region, a p-type drain region opposite to the source region with respect to the looped gate region, and a p-type channel region defined in the p-type well beneath the looped gate region, wherein the p-type channel region is shallower or smaller in dopant concentration than remaining portion of the p-type well so that the current is effectively modulated with the electric charge.

Charge transfer device equipped with junction type output transistor

A charge transfer device comprises a charge transfer section having a charge transfer region formed in a semiconductor substrate and transfer electrodes formed on the semiconductor substrate, and a reset transistor having a floating diffusion region formed in the semiconductor substrate for receiving an electric charge transferred from the charge transfer section, a reset drain applied with a reset voltage, and a reset gate formed above a channel between the floating diffusion region and the reset drain, the reset gate being applied with a reset pulse. A a peak hold circuit is connected to the reset gate of the reset transistor for hold a peak level of the reset voltage. A potential detection circuit includes a dummy transistor having a drain connected to a voltage V.sub.DD, a source grounded through a resistor which is considerably larger than an on-resistance of the dummy transistor itself, and a gate electrode connected to an output of the peak hold circuit. The dummy transistor has the same characteristics as that of the reset transistor, and the drain of the dummy transistor is directly connected to the reset drain of the reset transistor.

Charge transfer device having circuit for adjusting the high level of

In a linear image sensor, a circuit region including a number of photosensitive elements is provided at a center zone of the chip in a longitudinal direction of an elongated semiconductor chip. Two groups of bonding pads are locally concentrated in opposite end zones of the elongated chip, respectively. A plurality of bonding stitches formed on a package for supporting the substrate are divided into two arrays which include substantially the same number of bonding stitches and which are located at both sides of the substrate. Thus, an empty area in the chip can be made as small as possible, and therefore, the chip size can be minimized.

Linear image sensor

A solid-state image pick-up device is fabricated on a p-type semiconductor substrate, and having a plurality of photo-electric converters respectively having n-type impurity regions and formed in a surface portion of the semiconductor substrate at spacings, a shift register having an n-type charge transfer region separated from the n-type impurity regions by respective channel forming regions, a thin insulating film covering the channel forming regions and outlet subregions of the n-type impurity regions, and a transfer gate electrode extending on the thin insulating film, wherein the transfer gate electrode is shaped in such a manner as to create an electric field over each outlet subregion and the associated channel forming region so that carriers are accelerated from each outlet subregion through the associated channel forming region to the shift register.

Solid-state image pick-up device having electric field for accelerating

A charge transfer device includes a pair of charge transfer registers which receive signal charges from a photo sensor cell array and which transfer the received signal charges in the same direction along the charge tranfer registers, and a floating diffusion type charge reading section for reading the signal charges alternately from final stages of the pair of charge transfer registers. A signal charge detection circuit includes an output gate assembly provided between the final stage of each of the pair of charge transfer registers and a floating diffusion. A reading circuit operates to cause the signal charges alternately read from the final stages of the pair of charge transfer registers, to flow through a single channel under formed the output gate assembly, into the floating diffusion. An electric field is formed in the channel formed under the output gate assembly, so as to forcibly guide the signal charge from the final stage of each of the pair of charge transfer registers to the floating diffusion.

Charge detection circuit for use in charge transfer device

A charge transfer device is fabricated on a semiconductor substrate of a first conductivity type and comprises a well formed in a surface portion of the semiconductor substrate and having a second conductivity type opposite to the first conductivity type, a charge transfer region of the first conductivity type formed in a surface portion of the well, a floating diffusion region of the first conductivity type formed in the surface portion of the well and contiguous to the charge transfer region, an insulating film covering the surface portion of the well, and a plurality of gate electrodes provided on the insulating film and applied with driving clocks in such a manner as to produce conductive channels in the charge transfer region for transferring electric charges toward the floating diffusion region, in which the channels in the vicinity of the floating diffusion region are gradually decreased in width toward the floating diffusion region, and in which impurity atoms of the well beneath the charge transfer region in the vicinity of the floating diffusion region are graded toward the floating diffusion region, so that the electric charges are allowed to be swept thereinto without any residual.

Charge transfer device achieving a high charge transfer efficiency by

A charge coupled device comprises a plurality of photo electric converting elements of the p-n junction diode type, and the photo electric converting elements are coupled to associated vertical shift registers through gate transistors, in which n-type impurity region of each photo electric converting element has a wide portion accumulating electric charges produced in the presence of an optical radiation and a narrow portion partially overlapped with a transfer gate electrode of the gate transistor and having a width not allowing any narrow channel phenomenon to take place, so that no residual electric charges is left in the n-type impurity region without producing any potential barrier between the wide and narrow portions.

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Tokyo, Japan

Kazuo Miwada