Hitachi, Ltd.

Hitachi Video Engineering, Incorporated

Kazuo Ishikura

Masato Sugiyama

Masahiko Achiha

Kenji Katsumata

Takaaki Matono

Shigeru Hirahata

Isao Nakagawa

Sunao Suzuki

Mitsuo Nakajima

Haruki Takata

Yasuhiro Hirano

Toshiyuki Kurita

Yasutaka Tsuru

Kazuhiro Kaizaki

Shobu Saito

Takashi Hasegawa

Takao Watanabe

Yoshinobu Nakagome

Masahiro Kageyama

Ikuya Arai

Toshinori Murata

Atsushi Kiuchi

Tetsuya Nakagawa

Makoto Ohnishi

Hiroshi Yoshigi

Takahiko Fukinuki

Toshiyuki Sakamoto

Tsuguo Itagaki

Shoji Kimura

Takashi Kanehachi

Norihiro Suzuki

The present invention provides a movement correction frame count transformation apparatus for carrying out frame count transformation processing on a picture signal. In the apparatus, an input picture signal (S ) of interlaced scanning is converted into a signal (S ) of sequential scanning by an IP conversion unit ( ). A movement detecting unit ( ) detects movement detection signals (MD and MD ). A block unit movement vector searching unit ( ) detects a block unit movement vector (BMV) by carrying out block matching processing. A movement vector correcting unit ( ) carries out miniblock division processing to generate a movement vector (BV) if a movement correction error is equal to or greater than a threshold value. A pixel unit movement vector generating unit ( ) generates a movement vector with a smallest error component between a frame signal of a current frame and a frame signal of an immediately preceding frame as a movement vector of a pixel. An MC interpolation frame signal generating unit ( ) generates an interpolation frame in movement correction processing carried out by a median filter in order to produce a signal (S ) of sequential scanning as a result of frame count transformation based on movement correction.

Method and device for converting number of frames of image signals

A low-cost motion-compensated picture signal scan conversion circuit ensuring high picture quality is to be provided. The circuit has a motion-adaptive first interpolation signal generator; a second motion-compensated interpolation signal generator; a motion vector detector; and a setting unit for checking the reliability of motion compensation by comparing signals from the second interpolation signal generator with signals on interlaced scanning lines, and setting the selection of signals from the first and second interpolation signal generators, wherein interlaced scanned signals are converted into progressive scanned signals by setting the threshold so that the threshold become smaller with an increase in the number of re-searched blocks in the detection of motion vectors.

Circuit for scan conversion of picture signal using motion compensation

In order to carry out format conversion or scaling processing of picture signal by a memory having a small capacity, picture signals of interlace scanning are converted into picture signals of progressive scanning by interpolation by using an IP convertor 1 and a multiple scan convertor 3, a scaling processing of expansion and compression in the horizontal direction is firstly performed by using a horizontal scaling unit 5, processing of expansion, compression, frame rate conversion, synchronization and the like are secondly performed by using a vertical scaling unit 6 and commonly using memories used in scaling processing in the vertical direction and finally, color space conversion or inverse gamma processing is performed by using a picture quality improving unit 8 thereby converting the picture signals into picture signals S6 having a predetermined format.

Method and circuit for signal processing of format conversion of picture

A semiconductor integrated circuit having a two-dimensional array (MAR) and a parallel data transfer circuit (TRC) for transferring from the array data read out in parallel through data lines, in parallel to a processing circuit group (PE) by selecting the word lines of the two-dimensional memory array. The processing circuit group executing processing operations in parallel by using the data transferred from the parallel data transfer circuit. Each of the processing circuits having access to a plurality of series word lines and the data lines of the two-dimensional array through the parallel data transfer circuits. The arrangement of the parallel data transfer circuits allowing for an overlap range wherein data from each of the data lines of the memory array is available to more than one of the parallel data transfer circuits. Since the data lines of the two-dimensional memory array have the overlapped range, convolution processing operations or the like can be executed in parallel for the two-dimensional data stored in the two-dimensional memory array in a high parallelism and at a high speed.

Semiconductor IC with a plurality of processing circuits which receive

A scanning line interpolation circuit for reproducing scanning lines not transmitted through interpolation on the basis of a main scanning line signal and an auxiliary signal both transmitted, wherein an interpolated scanning line signal is generated on the basis of the main scanning line signal and auxiliary signal with respect to a frequency band used to transmit the auxiliary signal and an interpolated scanning line is generated in response to picture motion on the basis of only the main scanning line signal with respect to a frequency band used not to transmit the auxiliary signal.

Scanning line interpolation circuit

A video signal processing circuit capable of enlarging and displaying a picture and adapted for use in an apparatus in which a desired picture is selected, and a video signal representative of the desired picture under interlaced scanning is received, stored in a memory and processed to provide an enlarged video signal, includes a real signal/interpolated signal preparation circuit for preparing, from the stored video signal, new scanning lines for an image to be enlarged, and a memory processing circuit having switching control function to store an output signal of the real signal/interpolated signal preparation circuit in a memory, read the video signal out of the memory at a period different from a period at which the output signal is stored in the memory, and delay a read-out signal by one or more fields so that an enlarged signal is delivered.

Video signal processing circuit capable of enlarging and displaying a

A video signal processing circuit capable of enlarging and displaying a picture and adapted for use in an apparatus in which a desired picture is selected, and a video signal representative of the desired picture under interlaced scanning is received, stored in a memory and processed to provide an enlarged video signal, comprises includes a real signal/interpolated signal preparation circuit for preparing, from the stored video signal, new scanning lines for an image to be enlarged, and a memory processing circuit having switching control function to store an output signal of the real signal/interpolated signal preparation circuit in a memory, read the video signal out of the memory at a period different from a period at which the output signal is stored in the memory, and delay a read-out signal by one or more fields so that an enlarged signal is delivered.

A video signal processing circuit capable of reproducing a still picture signal from a color video signal comprises a luminance signal/chrominance signal separation circuit of a motion adaptive type, a scanning line interpolation circuit of a motion adaptive type connected with the separation circuit, a first memory connected with the separation circuit to store therein the output of the separation circuit, a second memory connected with the interpolation circuit to store therein the output of the interpolation circuit and a switching circuit for delivering therethrough the outputs of said first and second memories as a first output signal alternately and for delivering therethrough the outputs of said second and first memories as a second output signal alternately, the alternation for the delivery by the switching circuit being effected at a frequency identical with the field frequency of the video signal.

Sequential scanning converter with frame comb filter and freeze frame

There is provided a detection circuit for TV receiver which includes a frame comb filter and a field comb filter and which generates a luminance signal or a chrominance signal by effecting addition or subtraction upon video signals of two frames adjoining each other included in the received TV signal. This detection circuit includes a synchronization separation circuit, an APC circuit, a frequency division circuit connected to the APC circuit, and a comparator circuit connected to the frequency division circuit. The frequency of the chrominance subcarrier signal is demultiplied by the frequency division circuit. The phase of the chrominance subcarrier signal thus frequency-divided is compared with the phase of the synchronizing signal separated by the synchronizing separation circuit. It is thus judged whether the received TV signal is a standard TV signal or a nonstandard TV signal.

Detection circuit for detecting standard television signals and

A movement detector necessary for processing composite color television signals, which detects movement in image signals, wherein the detecting circuit is so constructed that no deficient motion is produced. A difference signal between the present frame and that preceding by two frames of the television signals is converted into a motion information signal and a movement detection signal is made by integrating the signal obtained by the conversion with respect to temporal axis.

Movement detector for composite color television signals

A movement detection circuit for detecting movement information of a luminance signal and movement information of a chrominance signal of a television signal comprises a first movement detection circuit for detecting the movement information of the luminance signal and a second movement detection circuit for detecting the movement information of the chrominance signal. The first movement detection circuit detects the movement information of the luminance signal based on two signals spaced by one frame period, and the second movement detection circuit detects the movement information of the chrominance signal based on two signals spaced by two frames periods.

Movement detection circuit of a video signal used in a television

A television signal processing circuit which separates a television signal into a luminance signal and a chrominance signal or interpolates the scanning lines of the television signal by using a video memory such as a frame memory or a field memory. The circuit determines whether the television signal to be treated is a standard television signal or a non-standard television signal. Depending upon this determination, the signal processing circuit changes its operation mode so that it operates properly even in case the television signal is different from the standard television signal and contains jitter in the time axis like the signal from a VTR. When the television signal is a non-standard television signal, the processing circuit without the video memory operates.

Television signal processing circuit

A scanning line interpolation circuit for interpolating scanning lines of an interlaced television signal to thereby obtain a television signal having the doubled number of scanning lines, in which, in order to improve the quality of the reproduced television picture, the interpolation circuit is constituted by a spatio-temporal filter and a time compression circuit, and in the domain of the spatial vertical frequency and the time frequency, the total frequency characteristic of the spatio-temporal filter and the time compression circuit is set such that the response characteristic becomes zero at the vertical frequency and the time frequency of the scanning frequency of the interlaced television signal.

Scanning line interpolation circuit for television signal

A color television signal processing circuit receives an input signal of a composite color television signal in the form of superimposition of a chrominance carrier signal on a luminance signal, separates the chrominance carrier signal and the luminance signal, and doubles the number of scanning lines of the chrominance signal or the luminance signal as compared to the number of scanning lines of the composite color television signal. A separation circuit separates the chrominance carrier signal and the luminance signal on the basis of a difference signal of the composite color television signal between adjacent frames or adjacent fields. A scanning line interpolation circuit doubles the number of scanning lines of at least the luminance signal delivered out of the separation circuit on the basis of an interpolation scanning signal derived from a signal indicative of scanning lines for the adjacent preceding field.

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Yokohama, Japan

Kazuo Ishikura