Nec Corporation

Kazunori Nagasaki

Kazuhiro Takeuchi

A data processor comprises a CPU and an interruption controller connected with control signal line. The CPU changes signal level at a control signal line in response to an interruption request. The interruption controller executes the interruption control at the timing of rising or falling of the level with detecting a change of the signal level at said control signal line.

Data processor for interruption control between the CPU and the

A communication apparatus includes a comparator comparing the voltage at one external bus with that at another external bus, and an oscillator. The comparator has a high speed operation mode and a low speed operation mode, and the oscillator has an oscillating operation mode and a non-oscillating operation mode. A sleep signal is supplied to the communication apparatus, to put the comparator in the low speed operation mode and put the oscillator in the non-oscillating operation mode. When a fall or a rise is detected in an output of the comparator, the oscillator is changed to the oscillating operation mode, and thereafter, the comparator is changed to the high speed operation mode.

Communication apparatus with low power consumption

A semiconductor memory unit employed in a microcomputer system includes an address counter for fetching address information from a microcomputer in response to an address latch signal from the microcomputer. The address counter further receives an updating control signal from the microcomputer and updates the fetched address information by one in response to each updating control signal. The memory device further includes a program memory for storing a string of instructions and an address decoder circuit for accessing the program memory in response to the address information from the address counter. Since the address information is updated by the updating control signal, the microcomputer fetches and executes the successive instructions without supplying the respective address information to the memory device.

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Tokyo, Japan

Kazunori Nagasaki