Mitsubishi Denki Kabushiki Kaisha

Renesas Electronics Corporation

Renesas Technology Corp.

Mitsubishi Denki Kabsuhiki Kaisha

Kazunobu Miki

Yoshihiro Kashiba

Yoshinori Deguchi

Shigeki Maekawa

Megumi Takemoto

Teruaki Kanzaki

Kiyohiko Sakakibara

Takahiro Nagata

Tatsuo Kasaoka

Mutsumi Kano

Noboru Mori

Takashi Yamashita

Shigeru Harada

Noriaki Fujiki

Hiroyuki Momono

Hiroshi Mitsuyama

Katsuhiro Hasegawa

Keiko Nishitsuji

The present invention aims at offering the semiconductor device which can improve the strength to the stress generated with a bonding pad. In the semiconductor device concerning the present invention, a plurality of bonding pads are formed on a semiconductor chip. In each bonding pad, a plurality of second line-like metals are formed under the first metal formed using the wiring layer of the top layer. And a bonding pad is put in order and located along the long-side direction of a second metal to achieve the above objects. That is, a bonding pad is put in order and located so that the long-side direction of a second metal and the arrangement direction of a bonding pad may become in the same direction.

Semiconductor device

According to one embodiment of the present invention, a method of manufacturing a semiconductor device includes below steps. A step of preparing a phase shift mask and a normal photomask. A step of stacking a first wiring layer on a semiconductor substrate, and further stacking, on the first wiring layer, a second wiring layer. The second wiring layer includes a second wiring and third wiring. A step of stacking an interlayer insulating film on the second wiring layer. A step of forming, in the interlayer insulating film, a first opening in which the second wiring is exposed, and a second opening in which the third wiring is exposed by photolithography using the normal photomask. A step of burying a metal in the first opening and the second opening. A step of providing a pad to be overlaid on the first and second openings.

Method of manufacturing semiconductor device that uses both a normal photomask and a phase shift mask for defining interconnect patterns

Method of manufacturing semiconductor device including forming inter-layer insulating film on semiconductor substrate. First metal film is formed on inter-layer insulating film. First resist is formed on first metal film and patterned. Anisotropic etching performed on first metal film using first resist as mask. First resist is removed and second metal film is formed on inter-layer insulating film to cover remaining first metal film. Second resist is formed on second metal film in area where first metal film exists on inter-layer insulating film and part of area where first metal film does not exist. Anisotropic etching is performed on second metal film using second resist as mask and bonding pad having first metal film and second metal film, and upper layer wiring having second metal film and not first metal film. Second resist is removed. Surface protection film covering bonding pad is formed. Pad opening is formed on bonding pad.

According to one embodiment of the present invention, a method of manufacturing a semiconductor device includes below steps. A step of preparing a phase shift mask and a normal photomask. A step of stacking a first wiring layer on a semiconductor substrate, and further stacking, on the first wiring layer, a second wiring layer. The a second wiring layer includes a second wiring and a third wiring. A step of stacking an interlayer insulating film on the second wiring layer. A step of forming, in the interlayer insulating film, a first opening in which the second wiring is exposed, and a second opening in which the third wiring is exposed by photolithography using the normal photomask. A step of burying a metal in the first opening and the second opening. A step of providing a pad to be overlaid on the first and second openings.

A semiconductor device test probe having a tip portion for being urged against an electrode pad of an integrated semiconductor device to establish an electrical contact against the electrode pad for testing functions of the semiconductor device. The spherical tip portion has a radius of curvature r expressed by 9t&#x2266;r&#x2266;35t where r is the radius of curvature of the spherical surface and t is the thickness of the electrode pad. The tip portion may have a first curved surface substantially positioned in the direction of slippage of the probe when the probe is urged against the electrode pad and slipped relative to the electrode pad and a second curved surface opposite to the first curved surface. The first curved surface has a radius of curvature of from 7 &#x3bc;m to 30 &#x3bc;m and larger than that of the second curved surface. The test probe may be manufactured by a method comprising the steps of roughing the tip portion of the curved surface by abrasing by means of electrolyte abrasion or abrasing particles to form a symmetrical spherical curved surface, and finishing the tip portion by sliding it on an abrasive member comprising an elastically deformable thick film fixed to a substrate and having abrasive particles therein or thereon directly or through a metallic film.

Semiconductor device test probe

A semiconductor device test probe having a tip portion for being urged against an electrode pad of an integrated semiconductor device to establish an electrical contact against the electrode pad for testing functions of the semiconductor device. The spherical tip portion has a radius of curvature r expressed by 9t&#x2266;r&#x2266;35t, where r is the radius of curvature of the spherical surface and t is the thickness of the electrode pad. The tip portion may have a first curved surface substantially positioned in the direction of slippage of the probe when the probe is urged against the electrode pad and slipped relative to the electrode pad and a second curved surface opposite to the first curved surface. The first curved surface has a radius of curvature of from 7 &#x3bc;m to 30 &#x3bc;m and larger than that of the second curved surface. The test probe may be manufactured by a method comprising the steps of roughing the tip portion of the curved surface by abrasing by means of electrolyte abrasion or abrasing particles to form a symmetrical spherical curved surface, and finishing the tip portion by sliding it on an abrasive member comprising an elastically deformable thick film fixed to a substrate and having abrasive particles therein or thereon directly or through a metallic film.

A test probe for semiconductor devices, the test probe having a tip portion which is pressed against a test pad of a semiconductor device to establish electrical contact between the tip portion and the pad for testing the operation of the semiconductor device, wherein the probe is formed to have a tip shape with an angle of not less than 15 degrees formed at the surface of the pad between a tangential line with respect to a tip face of the probe and the pad surface when the probe is pressed against the pad, the tip shape of the probe having a spherical surface meeting the relationship of:&#x3b8;=cos(1&#x2212;)&#x2267;15&#xb0;where the radius of curvature of the spherical surface is R, the thickness of the pad is t, and the angle formed at the pad surface between the tangential line with respect to the probe tip face and the pad surface when the probe is pressed against the pad is &#x3b8;, the probe have a flat portion at an end of the tip portion. Accordingly, a contact surface can be established between the probe trip and the pad with a sufficient degree of electrical continuity, and when the the probe level is adjusted in the probing, a time required for positioning the probe prior to the start of measurement is cut down and variation in measurement are reduced.

Test probe for semiconductor devices, method of manufacturing of the same, and member for removing foreign matter

In a semiconductor element test apparatus and a method of testing a semiconductor element using the apparatus, a plurality of probe needles are brought into contact with semiconductor elements fabricated on a semiconductor wafer, and a structure is provided for attaching a probe card and a reinforcement member to a probe card hold member. In a plurality of mount positions in which a probe card substrate and a reinforcement member are attached to a probe card hold member, counterbores are formed so as to assume substantially the same depth and shape. Analogous mount structures are realized at a plurality of mount positions by way of the counterbores.

Semiconductor element test apparatus, and method of testing semiconductor element using the apparatus

A semiconductor device test probe having a tip portion for being urged against an electrode pad of an integrated semiconductor device to establish an electrical contact against the electrode pad for testing functions of the semiconductor device. The spherical tip portion has a radius of curvature r expressed by 8t&lE;r&lE;23t, where r is the radius of curvature of the spherical surface and t is the thickness of the electrode pad. The tip portion may have a first curved surface substantially positioned in the direction of slippage of the probe when the probe is urged against the electrode pad and slipped relative to the electrode pad and a second curved surface opposite to the first curved surface. The first curved surface has a radius of curvature of from 7 &mgr;m to 30 &mgr;m and larger than that of the second curved surface. The test probe may be manufactured by a method comprising the steps of roughing the tip portion of the curved surface by abrasing by means of electrolyte abrasion or abrasing particles to form a symmetrical spherical curved surface, and finishing the tip portion by sliding it on an abrasive member comprising an elastically deformable thick film fixed to a substrate and having abrasive particles therein or thereon directly or through a metallic film.

Semiconductor device test probe having improved tip portion and manufacturing method thereof

A semiconductor device which is provided with enhanced reliability and capable of preventing cracking of a layer below an interconnection layer and separation of the interconnection layer and a bonding pad electrode layer. The semiconductor device includes: an interconnection layer including a conductive material formed on a silicon substrate; an intermediate layer formed in contact with interconnection layer and including a titanium layer and a titanium nitride layer; and a bonding pad electrode layer which is in contact with the intermediate layer.

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Tokyo, Japan

Kazunobu Miki