Seiko Epson Corporation

Dexerials Corporation

Kazunobu Kuwazawa

Mitsuo Sekisawa

Takehiro Endo

Noriyuki Nakamura

Hiroaki Nitta

Shigeyuki Sakuma

Sanae Nishida

Yutaka Maruo

Yoshitaka Narita

Tetsuo Tatsuda

Hideyuki Akanuma

Yorito Sakano

A solid-state image sensor including: a first impurity region of a first conductivity type; a plurality of second impurity regions of a second conductivity type disposed in the first impurity region and arranged in a first direction; and a light shielding layer that overlaps the first impurity region and does not overlap the second impurity regions in a plan view, wherein the first impurity region has a first portion between adjacent ones of the second impurity regions, the light shielding layer has a second portion that overlaps the first portion in a plan view, and a length of the second portion in the first direction is smaller than a length of the first portion in the first direction.

Solid-state image sensor and image reading device

A semiconductor device is provided in which a zener diode having a desired breakdown voltage and a capacitor in which voltage dependence of capacitance is reduced are mounted together, and various circuits are realized. The semiconductor device includes: a semiconductor layer; a first conductivity type well that is arranged in a first region of the semiconductor layer; a first conductivity type first impurity diffusion region that is arranged in the well; a first conductivity type second impurity diffusion region that is arranged in a second region of the semiconductor layer; an insulating film that is arranged on the second impurity diffusion region; an electrode that is arranged on the insulating film; and a second conductivity type third impurity diffusion region that is arranged at least on the first impurity diffusion region.

Semiconductor device and manufacturing method thereof

A semiconductor device includes a first conductivity type semiconductor substrate, a second conductivity type first and second buried diffusion layers that are arranged in the semiconductor substrate, a semiconductor layer arranged on the semiconductor substrate, a second conductivity type first impurity diffusion region that is arranged in the semiconductor layer, a second conductivity type second impurity diffusion region that is arranged, in the semiconductor layer, on the second buried diffusion layer, a second conductivity type first well that is arranged in a first region of the semiconductor layer, a first conductivity type second well that is arranged, in the semiconductor layer, in a second region, a first conductivity type third and fourth impurity diffusion regions that are arranged in the first well, and a first conductivity type fifth impurity diffusion region that is arranged in the second well.

This solid-state image capturing device includes a light receiving element, a charge holding region, and a floating diffusion region that are arranged in a semiconductor substrate, and the light receiving element, a first transfer gate, and a second transfer gate in the semiconductor substrate, and is configured to have a potential gradient in the charge holding region such that signal charges that have been transferred from the light receiving element to the charge holding region by the first transfer gate are distributed more on the second transfer gate side than on the first transfer gate side.

Solid-state image capturing device and electronic apparatus

In this solid-state imaging device, the sameness of the potential distributions in pixels, in a region from a photodiode of a transfer transistor to a floating diffusion in a charge transfer path, is improved. The solid-state imaging device includes a first transfer transistor including a first photodiode, a first gate electrode, and a first floating diffusion, a second transfer transistor including a second photodiode, a second gate electrode, and a second floating diffusion, a third transfer transistor including a third photodiode, a third gate electrode, and a third floating diffusion, and a reset transistor including a diffusion layer, which is a source or drain region, and a reset gate. The first to third floating diffusions and the diffusion layer of the reset transistor are separated from each other, and are electrically connected to each other via an interconnect. The first to third photodiodes are arrayed one-dimensionally.

Solid-state imaging device

A semiconductor device includes a P-type semiconductor substrate, a plurality of N-type buried diffusion layers that are arranged in the semiconductor substrate, an N-type first semiconductor layer that is arranged in a first region on a first buried diffusion layer, an N-type second semiconductor layer that is arranged in a second region on a second buried diffusion layer, an N-type first impurity diffusion region that surrounds the first region in plan view, a P-type second impurity diffusion region that is arranged in the second semiconductor layer, an N-type third impurity diffusion region that is arranged in the second semiconductor layer, an N-type fourth impurity diffusion region that is arranged in the first semiconductor layer. The second region is a region in which an N-type impurity diffusion region that has a higher impurity concentration than the second semiconductor layer cannot be arranged.

A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P-type pinning layer that is located in the P-well so as to be outside the gate electrode and start from a first end portion of the gate electrode, a P-type impurity region that is located in the P-well so as to extend under the gate electrode from a first end portion side and be in contact with the pinning layer, an N-type impurity region that is in contact with the P-type impurity region and the gate insulating film, and an N-type impurity region that surrounds at least a portion of the N-type impurity region in plan view.

Solid-state imaging device and manufacturing method thereof

A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P-type pinning layer that is located in the P-well so as to be outside the gate electrode and start from a first end portion of the gate electrode, a P-type impurity region that is located in the P-well so as to extend under the gate electrode from a first end portion side and be in contact with the pinning layer, an N-type impurity region that is located in the P-well so as to extend under the pinning layer and the P-type impurity region and be in contact with the P-type impurity region and the gate insulating film, and an N-type impurity region that is located in the P-well and includes a portion that is under a second end portion of the gate electrode.

A semiconductor apparatus includes elements formed on a substrate, a first insulation layer, a first pad and a second pad arranged on the first insulation layer and located above the elements, and a second insulation layer that is arranged on the side surfaces and upper surfaces of the first pad and the second pad. The second insulation layer includes openings at upper surfaces of the first pad and the second pad. The thickness of the first pad and the second pad is 2 &#x3bc;m or more, the thickness of the second insulation layer is less than or equal to &#x2156; of the thickness of the first pad and the second pad, and the distance between the first pad and the second pad is greater than or equal to four times the thickness of the first pad and the second pad.

Semiconductor apparatus, method for manufacturing the same, electronic device, and moving body

A solid state imaging device according to the invention includes: a semiconductor layer of a first conductivity type; a gate insulation film that is located on the semiconductor layer; a gate electrode that is located on the gate insulation film; a first impurity region of a second conductivity type that is located at least in a region outside the gate electrode on a first end portion side; a second impurity region of the second conductivity type that is located in a region extending across a second end portion that is opposite to the first end portion of the gate electrode; and a third impurity region of the first conductivity type that is located on top of the second impurity region at a position outside the gate electrode on the second end portion side, and is in contact with the second impurity region.

Solid state imaging device and manufacturing method thereof

A solid-state imaging device includes a P-well, a gate insulating film, a gate electrode, a P-type pinning layer that is located in the P-well so as to be outside the gate electrode and start from a first end portion of the gate electrode, a P-type impurity region that is located in the P-well so as to extend under the gate electrode from a first end portion side and be in contact with the pinning layer, an N-type impurity region that is located in the semiconductor layer under the P-type impurity region and includes a portion that is under the pinning layer, and an N-type impurity region that is in contact with the gate insulating film and the P-type impurity region and is located so as to surround the N-type impurity region in plan view.

A semiconductor device includes a P-channel DMOS transistor provided with an N-type gate electrode, a P-channel MOS transistor provided with a P-type gate electrode, and an N-channel MOS transistor provided with an N-type gate electrode. The N-type gate electrode of the P-channel DMOS transistor desirably has a first end portion that is located on a source side of the P-channel DMOS transistor, a second end portion that is located on a drain side of the P-channel DMOS transistor, and a P-type diffusion layer at the first end portion.

Semiconductor device and manufacturing method for the same

A semiconductor device includes an N-type well, a P-type body diffusion layer, an N-type source diffusion layer, an N-type drain diffusion layer, and a P-type body contact region. A plurality of the P-type body contact regionsare located along gate electrodesand, a plurality of first contact holesare located along the gate electrodes, and a plurality of second contact holesare located along the gate electrodes. The pitch of the plurality of P-type body contact regionsis larger than the pitch of the plurality of first contact holes

Semiconductor device

A solid-state imaging device includes: a first photodiode receiving light of a first color; a second photodiode that is arranged next to the first photodiode in a first direction and receives light of a second color; a third photodiode that is arranged next to the second photodiode in a second direction and receives light of the first color; a fourth photodiode that is arranged next to the third photodiode in the first direction and receives light of a third color; a first reset transistor for discharging a charge generated in the first photodiode and the second photodiode; and a second reset transistor for discharging a charge generated in the third photodiode and the fourth photodiode. The first photodiode and the third photodiode have a small difference in area.

Growing community of inventors

Sakata, Japan

Kazunobu Kuwazawa