Panasonic Corporation

Kazuki Sawa

Takeru Yamashita

Hiroko Yamamoto

A plasma display device includes an image signal processing circuit having a sequential addressing processing circuit, an alternate addressing processing circuit and an image data selection circuit. The sequential addressing processing circuit includes a sequential addressing array unit for converting an image signal into image data arranged in the order corresponding to a sequential address operation. The alternate addressing processing circuit includes an alternate addressing array unit for converting an image signal into image data arranged in the order corresponding to an alternate address operation. The image data selecting circuit selecting between the sequential and alternate addressing operations based on predicted power consumption.

Plasma display device

A frame correlation determination part is for determining a level of correlation of decoded image signals between frames. A flat region detection part is for detecting an image region in which a difference in brightness between neighboring pixels is small as a flat region from the decoded image signals. A high-frequency region detection part is for detecting an image region including a high spatial frequency component as a high-frequency region from the decoded image signal. A smoothing processing part is for performing smoothing processing to the decoded image signal corresponding to a predetermined region. A processing region setting part is for setting an image region in which the smoothing processing part is to perform smoothing processing to the decoded image signal are included. The processing region setting part sets at least a region in frames in which a correlation between frames is low and which is a flat region and not a high frequency region in the decoded image signals, as a processing region.

Block noise reduction device and image display device

A plasma display device includes the following elements: an image signal conversion circuit for converting an image signal into an image data; a data electrode driver circuit for driving data electrodes according to the image data; a power calculation circuit for calculating a power consumption of the data electrode driver circuit according to the image data; and a temperature calculation circuit for calculating a temperature of the data electrode driver circuit according to the image data. The image signal conversion circuit converts the image signal into an image data decreasing the power consumption of the data electrode driver circuit at least when the calculated power consumption exceeds a predetermined power threshold value, or when the calculated temperature exceeds a predetermined temperature threshold value.

A frame-cyclic noise reduction device of an image display device, in which one field is divided into a plurality of sub-fields, and turned-on sub-fields are properly combined to provide an image with gradation. The noise reduction device detects an area where an edge portion of an image becomes unclear, i.e., where sub-field fuzziness becomes worse, and controls a cyclic amount for the area in which sub-field fuzziness becomes worse so as to be different from that for another area, thereby decreasing noise.

Growing community of inventors

Osaka, Japan

Kazuki Sawa