Canon Kabushiki Kaisha

Sony Corporation

Kazuki Sato

Hiroyuki Yamada

Yuji Takaoka

Makoto Murai

Makoto Imai

Shigeki Amano

An apparatus includes at least one memory configured to store instructions, and at least one processor coupled to the at least one memory and configured to execute the instructions to perform image composition of a plurality of images with different focus positions, calculate contrast-related values based on the plurality of images, generate a composition map based on the contrast-related values, divide a region based on subjects with respect to the plurality of images, and correct a gradation for the each region that has been divided.

Image processing apparatus for combining a plurality of images, imaging apparatus, imaging method, and recording medium

An image processing apparatus that is capable of ensuring a wide dynamic range while reducing strangeness generated due to a moving body. The image processing apparatus acquires a plurality of images amplified with different gains, respectively, for each of exposure operations with different exposure amounts, determines whether or not there is a moving body having moved between images acquired for each of exposure operations with different exposure amounts, and selects images to be used for image combination out of the plurality of acquired images, based on a result of the determination.

Image processing apparatus capable of ensuring wide dynamic range while reducing strangeness generated due to moving body, method of controlling same, and image capturing apparatus

An image processing apparatus that executes jobs in parallel using a small number of resources. A controller includes an image processor that applies an image process to image data. A scanner controller includes storage for storing image data generated by scanning a document with a scanner and transfers the image data stored to the controller through a data bus. A processor executes instructions to set a frequency of an image transfer clock to a first frequency when a first job including a process that transfers image data generated by scanning documents to the controller is executed alone, and set the frequency of the image transfer clock to a second frequency lower than the first frequency when the first job is executed in parallel to a second job including an image process. The frequency of the image transfer clock is maintained at the second frequency until finishing the first job.

Image processing apparatus having functions including scan function, control method thereof, and storage medium storing program for executing control method

A multifunction peripheral capable of preventing discontinuation of a simultaneous double-sided reading process, caused by congestion of an image bus. An image transfer clock is controlled for transferring image data of a document sheet from a reading unit for reading both sides of the document sheet, to an image processing unit for performing image processing on data acquired via an image bus. When transfer of image data of one side of the document sheet is singly executed, a frequency of the image transfer clock is set to a predetermined frequency, and when transfer of image data of the other side of the document sheet, which is executed in succession to the transfer of image data of the one side, is to be executed in parallel with the image processing, the frequency is switched from the predetermined frequency to a lower frequency than the same.

Multifunction peripheral capable of executing double-sided reading process, method of controlling same, and storage medium

A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, and one or more conductive layers and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the one or more conductive layers, and has one or more apertures on each of the one or more conductive layers. The plurality of solder-including electrodes include two or more first electrodes having a same function other than a function of power supply. The one or more conductive layers include a continuous first conductive layer. The two or more first electrodes are connected to the continuous first conductive layer. The one or more apertures are confronted with the respective two or more first electrodes.

Semiconductor device and method of manufacturing the same

A semiconductor chip includes a chip body and a plurality of solder-including electrodes provided on an element-formation surface of the chip body. A packaging substrate includes a substrate body, and a plurality of wirings and a solder resist layer that are provided on a front surface of the substrate body. The plurality of solder-including electrodes include a plurality of first electrodes and a plurality of second electrodes. The plurality of first electrodes supply a first electric potential, and the plurality of second electrodes supply a second electric potential different from the first electric potential. The plurality of first electrodes and the plurality of second electrodes are disposed alternately in both a row direction and a column direction, in a central part of the chip body. The plurality of wirings include a plurality of first wirings and a plurality of second wirings. The plurality of first wirings connect the plurality of first electrodes, and the plurality of second wirings connect the plurality of second electrodes.

Semiconductor chip mounted on a packaging substrate

Provided is a semiconductor device that includes a semiconductor chip, and a packaging substrate on which the semiconductor chip is mounted. The semiconductor chip includes a chip body and a plurality of solder-including electrodes that are provided on an element-formation surface of the chip body. The packaging substrate includes a substrate body, and a plurality of wirings and a solder resist layer that are provided on a front surface of the substrate body. The solder resist layer is provided as a continuous layer on the front surface of the substrate body and the plurality of wirings, and has an aperture on each of the plurality of wirings. The aperture has a planar shape elongated in a lengthwise direction of the wiring inside the aperture, with a length of the aperture adjusted in accordance with a thermal expansion coefficient of the packaging substrate.

Growing community of inventors

Kanagawa, Japan

Kazuki Sato