Renesas Electronics Corporation

Renesas Technology Corp.

Kazuhito Ichinose

Akie Yutani

Yukari Imai

Hiraku Chakihara

Akio Nishida

Tatsunori Murata

Hidetsugu Ogishi

Seiji Muranaka

Kazuyuki Omori

Ken Okutani

Kotaro Kihara

Pretreatment is carried out in a first chamber. Then, a mixed gas of titanium tetrachloride and hydrogen is supplied into a second chamber. At this time, conditions are set such that partial pressure of the titanium tetrachloride is higher than 3 Pa. The conditions are set such that the product of the partial pressure of the titanium tetrachloride and supply time is greater than 800 Pa&#xb7;second. The titanium tetrachloride continues to be supplied into the second chamber to form a titanium film under prescribed temperature conditions in a plasma atmosphere. The temperature conditions are set such that temperature is higher than temperature at which titanium silicide is formed and lower than temperature at which a metal silicide film agglomerates. A titanium nitride film is formed in a third chamber.

Method of manufacturing semiconductor device and semiconductor device

Disclosed is a semiconductor device whose reliability can be improved. The semiconductor device includes: first wiring formed over a semiconductor substrate via a first insulating film; a second insulating film that includes an inorganic film covering the first wiring and that has a flat surface on which CMP processing has been performed; a third insulating film that is formed over the second insulating film and includes an inorganic film having moisture resistance higher than that of the second insulating film; and second wiring formed over the third insulating film. The thickness of the second wiring is 10 times or more larger than that of the first wiring, and the second wiring is located over the third insulating film without an organic insulating film being interposed between itself and the third insulating film.

Semiconductor device and manufacturing method thereof, and mounting method of semiconductor device

A process for burying a tungsten member into a blind hole formed in a wafer, in which blind hole a through via is to be made. Film-formation (for forming the tungsten member) is carried out to position, at the periphery of the wafer, the outer circumference of the tungsten member inside the outer circumference of a barrier metal beneath the tungsten film. This process makes it possible to bury the tungsten member, which may be relatively thin, into the blind hole, which may be relatively large, so as to decrease a warp of the wafer and further prevent an underlying layer beneath the tungsten member from being peeled at the periphery of the wafer.

Method of forming a via in a semiconductor device

To provide a semiconductor device which can reduce an electrical resistance between a plug and a silicide region, and a manufacturing method thereof. At least one semiconductor element having a silicide region, is formed over a semiconductor substrate. An interlayer insulating film is formed over the silicide region. A through hole having an inner surface including a bottom surface comprised of the silicide regions is formed in the interlayer insulating film. A Ti (titanium) film covering the inner surface of the hole is formed by a chemical vapor deposition method. At least a surface of the Ti film is nitrided so as to forma barrier metal film covering the inner surface. A plug is formed to fill the through hole via the barrier metal film.

Method for manufacturing a semiconductor device having a silicide region comprised of a silicide of a nickel alloy

To provide a semiconductor device which can reduce an electrical resistance between a plug and a silicide region, and a manufacturing method thereof. At least one semiconductor element having a silicide region, is formed over a semiconductor substrate. An interlayer insulating film is formed over the silicide region. A through hole having an inner surface including a bottom surface comprised of the silicide regions is formed in the interlayer insulating film. A Ti(titanium) film covering the inner surface of the hole is formed by a chemical vapor deposition method. At least a surface of the Ti film is nitrided so as to form a barrier metal film covering the inner surface. A plug is formed to fill the through hole via the barrier metal film.

A method of manufacturing a semiconductor device according to the present invention includes the steps of introducing first impurities of a first conductivity type into a main surface of a semiconductor substrateto form a first impurity region, introducing second impurities of a second conductivity type to form a second impurity region, forming a first nickel silicide film on the first impurity region and forming a second nickel silicide film on the second impurity region, removing an oxide film formed on each of the first and second nickel silicide films by using a mixed gas having an NHgas and a gas containing a hydrogen element mixed therein, and forming a first conducting film on the first nickel silicide film and forming a second conducting film on the second nickel silicide film, with the oxide film removed.

Method of manufacturing a semiconductor device

Semiconductor device

A low resistance Co silicide layer with less leakage current is formed over the surface of the source and drain of a MISFET by optimizing the film forming conditions and annealing conditions upon formation of Co (cobalt) silicide. More specifically, a low resistance source and drain (ntype semiconductor regions, ptype semiconductor regions) with less junction leakage current are formed, upon formation of a Co silicide layer by heat treating a Co film deposited over the source and drain (ntype semiconductor regions, ptype semiconductor regions) of the MISFET, by depositing the Co film at a temperature as low as 200&#xb0; C. or less, carrying out heat treatment in three stages to convert the Co silicide layer from a dicobalt silicide (CoSi) layer to a cobalt monosilicide (CoSi) layer and, then, to a cobalt disilicide (CoSi) layer, successively.

Fabrication method of semiconductor integrated circuit device

In a semiconductor device, the ohmic contact at the junction between the metal interconnection and the semiconductor layer is lowered by depositing a first conductor layer comprised of, for example, tungsten nitride and a second conductor layer comprised of, for example, tungsten silicide successively from the lower layer so as to cover the upper surface of intermediate conductive layers comprised of a metal, for example, tungsten as a main interconnection material, subsequently introducing an impurity, for example, boron (b) to the second conductor layer, then patterning the first and the second conductor layers thereby forming a conductor layer, and then forming a lower semiconductor layer comprised of, for example, polycrystal silicon for forming a semiconductor region for source and drain of load MISFET of SRAM so as to be in contact with the conductor layer.

Growing community of inventors

Chiyoda-ku, Japan

Kazuhito Ichinose