Rohm Co., Ltd.

Kazuhisa Ukai

Koji Nigoriike

Hiromitsu Kimura

Takaaki Fuchikami

Seiichi Yamamoto

Tsuyoshi Okamoto

Kazutaka Miyamoto

A non-volatile storage device includes a memory that stores data in a non-volatile manner, a power supply that generates an internal voltage to feed it to the memory, a controller that controls the memory and the power supply, an A/D converter that performs A/D conversion on the internal voltage, and a fault detector that detects a fault related to data written in the memory based on the output of the A/D converter.

Non-volatile storage device

Disclosed is a semiconductor memory device including a memory cell based on a static random access memory having a 6T or 4T2R configuration and including a first internal node, a second internal node, a first ferroelectric capacitor, and a second ferroelectric capacitor, the first ferroelectric capacitor and the second ferroelectric capacitor having respective first ends connected respectively to the first internal node and the second internal node. For recovering data stored in a non-volatile fashion in the first ferroelectric capacitor and the second ferroelectric capacitor, a first access transistor connected between the first internal node and a first bit line and a second access transistor connected between the second internal node and a second bit line are turned on, and respective capacitive components of the first bit line and the second bit line are used as load capacitances.

Semiconductor memory apparatus

A nonvolatile semiconductor storage device includes a plurality of cell transistor pairs including a pair of cell transistors sharing a first node connected to a bit line or a source line, and a dummy gate line laid in parallel with gate lines of the cell transistors, the dummy gate line applying an off voltage to a dummy transistor between the cell transistor pairs. The gate lines and the dummy gate line may be laid at equal intervals. A plurality of impurity diffusion layers corresponding to the first node and second nodes of the cell transistors may be formed at equal intervals in a continuous active region.

Nonvolatile semiconductor storage device with cell transistors

A nonvolatile semiconductor storage device has floating-gate memory cells and a memory control circuit which controls them. During programming operation of the memory cells, the memory control circuit makes the potentials at the backgate and source of the memory cells equal. For example, during programming operation of the memory cells, the memory control circuit short-circuits together the backgate and source of the memory cells. For another example, during programming operation of the memory cells, the memory control circuit switches from a state where the potentials at the backgate and source of the memory cells are equal to a floating state.

Nonvolatile semiconductor storage device

A semiconductor memory device includes a memory array including a plurality of element blocks, the plurality of element blocks including end-portion element blocks arranged at an end portion of the memory array, and at least one dummy block disposed adjacent to the end-portion element blocks, the at least one dummy block being not in practical use. A layout pattern of the at least one dummy block is configured to correspond to only a portion of a layout pattern of the plurality of element blocks.

Semiconductor memory device

A semiconductor memory device includes a memory array including a plurality of element blocks; the plurality of element blocks including end-portion element blocks arranged at an end portion of the memory array, and at least one dummy block disposed adjacent to the end-portion element blocks, the at least one dummy block being not in practical use. A layout pattern of the at least one dummy block is configured to correspond to only a portion of a layout pattern of the plurality of element blocks.

Growing community of inventors

Kyoto, Japan

Kazuhisa Ukai