Hitachi, Ltd.

Renesas Technology Corp.

Mitsubishi Electric Corporation

Fuji Electric Co., Ltd.

National Institute of Advanced Industrial Science and Technology

Hitachi Power Semiconductor Device, Ltd.

Mitsubishi Heavy Industries Limited

Hitachi Metals, Ltd.

The University of Tokyo

Hitachi Engineering Co., Ltd.

Kazuhiro Mochizuki

Tomonori Tanoue

Isao Ohbu

Atsushi Kurokawa

Hiroshi Masuda

Akihisa Terano

Masao Yamane

Hiroyuki Uchiyama

Natsuki Yokoyama

Hidetoshi Matsumoto

Kiichi Yamashita

Tomonobu Tsuchiya

Hidekatsu Onose

Takashi Ishigaki

Katsuhiko Mitani

Norifumi Kameshiro

Ryoji Kosugi

Tohru Oka

Kenichi Tanaka

Susumu Takahashi

Yasuyuki Kawada

Tomoyoshi Mishima

Chisaki Takubo

Chushirou Kusano

Masahiko Kawata

Shiyang Ji

Koji Hirata

Yasunari Umemoto

Manabu Takei

Tohru Nakamura

Yoshihisa Fujisaki

Masaru Miyazaki

Ryuta Tsuchiya

Masami Ohnishi

Keigo Matsumoto

Shozo Kaneko

Atsushi Tsutsumi

Katsuhiko Yokohama

Chushiro Kusano

Yoshiyuki Yonezawa

Shigeo Goto

Naoki Kaneda

Kohei Adachi

Masaaki Kinoshita

Hidenori Koketsu

Yoshiki Yamaguchi

Hiroshi Ohta

Tadayoshi Tsuchiya

Yasuki Kansha

Kiyoshi Ouchi

Hiroji Yamada

Kenichiro Kosaka

Noboru Kawamoto

Hidenori Kouketsu

Koji Ohura

Chushiroh Kusano

Chihiro Fushimi

Tooru Haga

A semiconductor device that includes a SiC semiconductor substrate; a SiC epitaxial layer having an impurity concentration lower than that of the SiC semiconductor substrate; a first semiconductor layer including first semiconductor pillars and second semiconductor pillars; a second semiconductor layer; a device active region; a termination region; a channel stopper region having an impurity concentration higher than that of the SiC epitaxial layer; and a plurality of first chip end portions and a plurality of second chip end portions, and a surface of the first side surface is covered with an impurity region having an impurity concentration higher than those of the first semiconductor pillar and the SiC epitaxial layer and is connected to the channel stopper region.

Semiconductor device

A manufacturing yield and reliability of a semiconductor device including a power semiconductor element is improved. A plurality of trenches DT extending in an x direction and spaced apart from each other in a y direction orthogonal to the x direction are formed in a substrate having a main crystal surface tilted with respect to a &#x3c;11-20&#x3e; direction. Also, a super-junction structure is constituted of a p-type column region PC made of a semiconductor layer embedded in the trench DT and an n-type column region NC made of a part of the substrate between the trenches DT adjacent in the y direction, and an angle error between the extending direction of the trench DT (x direction) and the &#x3c;11-20&#x3e; direction is within &#xb1;&#x3b8;. The &#x3b8; is determined by {arctan {k&#xd7; (w/h)}}/13 for the trench having a height of h and a width of w. Herein, the k is at least smaller than 2, preferably 0.9 or less, more preferably 0.5 or less, and still more preferably 0.3 or less.

Semiconductor device and manufacturing method thereof

In a silicon carbide semiconductor device, an n-type drift layer is formed on a front surface of an n-type semiconductor substrate. Next, a trench is formed in the n-type drift layer, from a surface of the n-type drift layer. Next, a p-type pillar region is formed in the trench. A depth of the trench is at least three times a width of the trench. The p-type pillar region is formed by concurrently introducing a p-type first dopant and a gas containing an n-type second dopant incorporated at an atom position different from that of the first dopant.

Silicon carbide semiconductor device and a method of manufacturing a silicon carbide semiconductor device

A highly reliable semiconductor device with high withstand voltage is provided. As means therefor, an impurity concentration in a first JTE region is set to 4.4&#xd7;10cmor higher and 6&#xd7;10cmor lower and an impurity concentration in a second JTE region is set to 2&#xd7;10cmor lower in a case of a Schottky diode, and an impurity concentration in the first JTE region is set to 6&#xd7;10cmor higher and 8&#xd7;10cmor lower and an impurity concentration in the second JTE region is set to 2&#xd7;10cmor lower in a case of a junction barrier Schottky diode.

Semiconductor device with substantially equal impurity concentration JTE regions in a vicinity of a junction depth

In a semiconductor device having a silicon carbide device, a technique capable of suppressing variation in a breakdown voltage and achieving reduction in an area of a termination structure is provided. In order to solve the above-described problem, in the present invention, in a semiconductor device having a silicon carbide device, a p-type first region and a p-type second region provided to be closer to an outer peripheral side than the first region are provided in a junction termination portion, a first concentration gradient is provided in the first region, and a second concentration gradient larger than the first concentration gradient is provided in the second region.

Semiconductor device and method of manufacturing the same, power conversion device, three-phase motor system, automobile, and railway vehicle

A water-containing solid fuel drying apparatus that can efficiently dry with low energy consumption by effectively utilizing sensible heat and latent heat of a heating medium for drying, etc. is provided. A drying apparatus () that dries water-containing solid fuel includes a dryer () that injects scavenging gas into the interior of a drying vessel () in which a heat transfer pipe () is disposed; a dust collector () that removes microparticles from microparticle-containing mixed gaseous fluid that has flowed out of the drying vessel (); a compressor () that compresses vapor-containing mixed gaseous fluid; a vapor heat exchanger () that preheats low-pressure mixed gaseous fluid with high-pressure mixed gaseous fluid compressed at the compressor (); and a gas-liquid separator (), in which the high-pressure mixed gaseous fluid is employed as drying gas that radiates heat by passing through the heat transfer pipe (), that performs gas-liquid separation of water-containing scavenging gas that has flowed out of the heat transfer pipe () while containing condensed water of vapor generated due to heat radiation, wherein the water-containing solid fuel is dried by heating the water-containing solid fuel in the drying vessel () utilizing latent heat and sensible heat of the mixed gaseous fluid.

Water-containing solid fuel drying apparatus and drying method

Semiconductor device with similar impurity concentration JTE regions

A nitride semiconductor element having a high reverse breakdown voltage and a method of manufacturing the same are provided. A diode (a vertical-type SBD) has an n-type nitride semiconductor layer (a drift region) formed on an n-type nitride semiconductor substrate, a p-type nitride semiconductor layer formed on the n-type nitride semiconductor layer, and besides, an anode electrode formed on the p-type nitride semiconductor layer. The p-type nitride semiconductor layer has a relatively-thin first portion and a relatively-thick second portion provided so as to surround the first portion as being in contact with an outer circumference of the first portion. Also, the relatively-thin first portion of the p-type nitride semiconductor layer is formed thinner than the second portion so as to be depleted. The relatively-thick second portion of the p-type nitride semiconductor layer forms a guard ring part.

Nitride semiconductor element and method of manufacturing the same

Disclosed is a high performance nitride semiconductor having a reverse leak current characteristic with two-dimensional electron gas as a conductive layer. A desired impurity is diffused into or a nitride semiconductor to which a desired impurity is added is re-grown on the bottom surface and the side face portion of a recessed portion formed by dry etching using chlorine gas on the upper surface of a nitride semiconductor stacked film to increase resistance of the side face portion of the nitride semiconductor stacked film contacting an anode electrode, reducing the reverse leak current.

Nitride semiconductor diode

A semiconductor device includes a nitride semiconductor stack having at least two hetero junction bodies where a first nitride semiconductor layer and a second nitride semiconductor layer having a band gap wider than that of the first nitride semiconductor layer are disposed, and includes a drain electrode and, a source electrode disposed to the nitride semiconductor stack, and gate electrodes at a position put between the drain electrode and the source electrode and disposed so as to oppose them respectively in which the drain electrode and the source electrode are disposed over the surface or on the lateral side of the nitride semiconductor stack, and the gate electrode has a first gate electrode disposed in the direction of the depth of the nitride semiconductor stack and a second gate electrode disposed in the direction of the depth of the nitride semiconductor at a depth different from the first gate electrode.

Semiconductor device with hetero-junction bodies

In a semiconductor device including a stack structure having heterojunction units formed by alternately stacking GaN (gallium nitride) films and barrier films which are different in forbidden band width, a first electrode formed in a Schottky barrier contact with one sidewall of the stack structure, and a second electrode formed in contact with the other sidewall, an oxide film is interposed between the first electrode and the barrier films. Therefore, the reverse leakage current is prevented from flowing through defects remaining in the barrier films due to processing of the barrier films, so that a reverse leakage current of a Schottky barrier diode is reduced.

Semiconductor device and its fabrication method

In a Schottky electrode formation region on a nitride semiconductor, the total length of junctions of Schottky electrodes and a surface of a nitride semiconductor layer is longer than the perimeter of the Schottky electrode formation region. The total length is preferably 10 times longer than the perimeter. For example, the Schottky electrodes are formed concentrically and circularly.

In a bipolar device, such as transistor or a thyristor, the emitter layer or the anode layer is formed of two high-doped and low-doped layers, a semiconductor region for suppressing recombination comprising an identical semiconductor having an impurity density identical with that of the low-doped layer is present being in contact with a base layer or a gate layer and a surface passivation layer, and the width of the semiconductor region for suppressing recombination is defined equal with or longer than the diffusion length of the carrier. This provides, among other things, an effect of attaining reduction in the size of the bipolar transistor or improvement of the switching frequency of the thyristor without deteriorating the performance.

Bipolar device and fabrication method thereof

The present invention provides a semiconductor device which comprises active components, passive components, wiring lines and electrodes and are satisfactory in terms of mechanical strength, miniaturization and thermal stability. In the semiconductor device, openings are formed just below active components. These openings are filled with conductor layers. Conductor layers are also formed where openings are not formed.

Semiconductor HBT MMIC device and semiconductor module

This invention is intended to provide an HBT capable of achieving, if the HBT is a collector-up HBT, the constriction of the emitter layer disposed directly under an external base layer, and reduction in base-emitter junction capacity, or if the HBT is an emitter-up HBT, reduction in base-collector junction capacity. For the collector-up HBT, window structures around the sidewalls of a collector are used to etch either the emitter layer disposed directly under the external base layer, or an emitter contact layer For the emitter-up HBT, window structures around the sidewalls of an emitter are used to etch either the collector layer disposed directly under the external base layer, or a collector contact layer. In both HBTs, the external base layer is supported by a columnar structure to ensure mechanical strength.

Semiconductor device and method of manufacturing the same

Growing community of inventors

Tokyo, Japan

Kazuhiro Mochizuki