Hitachi, Ltd.

Hitachi Video Engineering, Incorporated

Maxell, Ltd.

Mitsubishi Electric Corporation

Hitachi Consumer Electronics Co., Ltd.

Hitachi Video and Information System, Inc.

Kazuhiro Kaizaki

Takaaki Matono

Shigeru Hirahata

Masato Sugiyama

Kenji Katsumata

Sadao Kubota

Toshinori Murata

Kazuo Ishikura

Sunao Suzuki

Akihiko Kandori

Mitsuo Nakajima

Susumu Yoshida

Ikuya Arai

Michitaka Ohsawa

Toshiyuki Kurita

Takeshi Mochizuki

Makoto Onozawa

Isao Nakagawa

Yuko Sano

Hiroshi Harada

Hidenao Kubota

Yuichiro Kimura

Haruki Takata

Tadashi Kasezawa

Shigeo Matsuura

Takumi Okamura

Noriyuki Yamaguchi

Shigeyuki Sasaki

Tomohiko Mizuguchi

Kuninori Matsumi

Kanako Esaki

Masaharu Yao

Yasuji Noguchi

Masanori Kamiya

Yuzo Nishinaka

Tomochika Yamashita

Nobufumi Nakagaki

Tamotsu Nagabayashi

Hiroshi Sekiya

Mitsuo Okimoto

Junji Motoshima

Kouichi Ishibashi

Tohru Suzaki

Toshihiro Tsutsui

Kenichi Fujiwara

Mituo Konno

Chiharu Ishino

Yasushi Saito

Takuzi Kurashita

Atushi Haratani

Masako Kamimura

Kenicji Matsumoto

Shinya Katsuki

Akito Takemoto

A brain dysfunction assessment device () comprises: a body movement indicator () which presents a body movement to be performed to a subject with a body movement presentation device (); a body movement data acquisition unit () which acquires the subject's body movement data with a body movement detection sensor (); a body movement accuracy calculation unit () which calculates a positional accuracy and a time sequence accuracy of the subject's body movement from the acquired body movement data; and a cognitive dysfunction assessment unit () which assesses the level of cognitive dysfunction of the subject by comparing a value which indicates the accuracy of the subject's body movement that is obtained from the calculated positional accuracy and time sequence accuracy with statistical data which indicates the accuracy of body movement of healthy individuals.

Brain dysfunction assessment method, brain dysfunction assessment device, and program thereof

There is provided an information display system for supporting a high safety driving, so that a driver can clearly recognize an obstacle. A shape of a virtual image indicating an outline or a frame line of the obstacle is changed according to a risk level of the obstacle against a vehicle, and a display position of the virtual image is adjusted according to a viewpoint position of the driver, so that a deviation in displaying between an actual obstacle and the virtual image is suppressed. In addition, there is provided an information display system which can make the driver intuitively recognize the obstacle without hindering the driving by displaying an estimated traffic line of the obstacle as the virtual image.

Information display system and information display device

A liquid crystal display device with improved thermal exhaustion property, enabling a thickness reduction, includes a backlight including light sources illuminating a liquid crystal panel from a back face, and a chassis holding the backlight. The backlight includes: plural light-source units each including a combination of a LED emitting light in a direction parallel to a display surface of the panel, a wiring board mounted with the LED, and a light-guide plate having translucency for guiding the LED light toward the panel; a metal chassis supporting the light-source units; and a thermally conductive sheet tightly inserted between the metal chassis and a reverse side of the wiring board opposite to the LED-mounted face. A wiring pattern is formed on the reverse side. The metal chassis and the wiring pattern located within a predetermined distance of the LED outer periphery are connected through the thermally conductive sheet.

Liquid crystal display device

A display apparatus for a television or computer terminal having a cathode ray tube with a deflection coil. The display apparatus includes a signal processing circuit which compresses a display period in a horizontal scanning period of an input video signal and which expands a blanking interval of the horizontal scanning period of the video signal, the signal processing circuit providing an output of the video signal to the cathode ray tube, and a horizontal retrace interval expansion circuit which expands a horizontal retrace line interval of a horizontal deflection current for the deflection coil of the cathode ray tube in accordance with the blanking period expanded by the signal processing circuit. The cathode ray tube displays the input video signal in accordance with the output of the signal processing circuit and the output of the horizontal retrace interval expansion circuit.

Display apparatus with circuit expanding horizontal retrace interval of horizontal deflection current

A plurality of photo detectors are arranged outside the display screen of a projection display apparatus having a built-in digital convergence correction system and a function for adjusting data in the frame memory so as to coincide the photoelectric devices of the photo detectors with the adjustment patterns is provided. The adjusted data when the convergence on the entire screen of the display is adjusted and the adjusted data when the convergence is adjusted by the adjustment function before misconvergence is generated are memorized beforehand. When misconvergence is generated, the convergence is adjusted by the adjustment function again, and a corresponding correction value is obtained on the photo detector by calculating the adjusted data at this time and the prememorized adjusted data, and a correction value on the entire screen is obtained by executing an interpolation calculation from this correction value, and the misconvergence on the entire screen is corrected.

Convergence correction system with recovery function and display

A television receiver which can display images in different displaying forms on a display screen with an aspect ratio of 16:9 by controlling the video chroma processing circuit by the micro computer by operating the remote controlled signal acceptor or the key switch has memories. The first memory stores video control data for each displaying form and the second memory stores appointed data for designating predetermined video control data. When the displaying form is changed by operating the remote controlled signal acceptor or the key switch, the micro computer reads the video control data corresponding to the displaying form which is newly set from the first memory according to the appointed data of the second memory and changes, for example, the contrast characteristic in the signal processing circuit according to the read data. By doing this, in the television receiver which is applicable to both a high quality television system and the conventional television system, when displaying images of conventional television signals in different displaying forms on a display screen with an aspect ratio of 16:9, the most suitable image quality can be obtained for each displaying form.

System and method for converting video signals for display on television

A video signal processing circuit is provided to display an image of a standard television signal on a display unit with a 6:9 aspect ratio by enlarging an image of a video signal in the horizontal and vertical directions by a magnification factor which depends on the feature of the standard television signal. The processing circuit includes a first memory circuit which reads out the stored video signal in response to a read clock different from the write clock and generated by a stable frequency source so that the image of the video signal is expanded in the vertical direction, a second memory circuit which implements time-base compression for the output of the first memory circuit and thereafter expands the signal, a spatial filter which implements filtering for the output of the second memory circuit, an enlargement control circuit which control the above-mentioned circuits, and a synchronizing processing circuit. The circuit arrangement enables video signals of various image sizes, such as for movie pictures, to be displayed by signal conversion on a display unit with a 16:9 aspect ratio, and is capable of suppressing jitters of video signals.

Compatible wide aspect ratio receiver with spatial filtering for

In a motion-adaptive television signal processor, a field as a reference for a moving picture signal includes a signal delayed by a frame memory or a field memory. A non-standard signal is beforehand processed so as to separate Y and C signals, and the signal thus processed is input to a motion-adaptive processor to thereby reduce a deviation in center of gravity between a still picture signal and a moving picture signal on the timebase to thereby suppress unnatural motion of the picture.

Image signal correction circuit and image signal processor using the

In a television receiver in which scanning for an incoming video signal is performed at a frequency n times as high as the input horizontal synchronous frequency by suitably controlling writing and reading on its video memory, the signals for writing and reading on the video memory unit are generated by a horizontal synchronization/deflection circuit. The horizontal synchronization/deflection circuit is arranged by having a clock generation/synchronous deflection circuit for generating reference signals to control the writing and reading on the video memory unit provided with a phase comparator such that a horizontal drive signal to drive a horizontal deflection circuit and a flyback pulse are brought in phase.

Television receiver with control of writing and reading of video memory

A video signal processing circuit capable of enlarging and displaying a picture and adapted for use in an apparatus in which a desired picture is selected, and a video signal representative of the desired picture under interlaced scanning is received, stored in a memory and processed to provide an enlarged video signal, includes a real signal/interpolated signal preparation circuit for preparing, from the stored video signal, new scanning lines for an image to be enlarged, and a memory processing circuit having switching control function to store an output signal of the real signal/interpolated signal preparation circuit in a memory, read the video signal out of the memory at a period different from a period at which the output signal is stored in the memory, and delay a read-out signal by one or more fields so that an enlarged signal is delivered.

Video signal processing circuit capable of enlarging and displaying a

A video signal processing circuit capable of enlarging and displaying a picture and adapted for use in an apparatus in which a desired picture is selected, and a video signal representative of the desired picture under interlaced scanning is received, stored in a memory and processed to provide an enlarged video signal, comprises includes a real signal/interpolated signal preparation circuit for preparing, from the stored video signal, new scanning lines for an image to be enlarged, and a memory processing circuit having switching control function to store an output signal of the real signal/interpolated signal preparation circuit in a memory, read the video signal out of the memory at a period different from a period at which the output signal is stored in the memory, and delay a read-out signal by one or more fields so that an enlarged signal is delivered.

A motion information signal generating circuit comprises a motion detecting circuit for detecting a piece of motion information from a digitized television signal; a temporal-spatial signal processing circuit for expanding a signal representing the so detected motion information both in time and space and a noise eliminator circuit connected between the motion detecting circuit and the temporal-spatial signal processing circuit. The noise eliminator circuit has at least one 1H memory to detect the correlation between the motion information signals pertaining to two adjacent picture elements which are one horizontal sweep line part, and for instance, the motion information signal of a smaller data quantity is selected, thereby preventing appearance of a false motion signal which would be caused by a noise of increased amplitude.

Motion signal generating circuit for use in a television receiver

A digital blanking reproducing circuit wherein video signals are converted into N (N: positive integer) bit digital signals and then signal-processed. On the basis of plural N bit signals during the blanking interval of the video signal, an M (M: positive integer, M&gt;N) bit average signal and a plurality of N bit approximation data in the neighborhood of the average value signal are produced. The plurality of N bit approximation data are time-divisionally output in a time-division ratio decided in accordance with the lower order (M - N) bit data of the average signal. Thus, the signal processing of the N bit signals provides the accuracy equivalent to that of M (M&gt;N) bit signals.

Digital blanking reproducing circuit

A noise reduction circuit for reducing noise in video signal comprises delay circuits for delaying an output video signal for delay time 2S and H-S (H denotes one horizontal scanning period and S denotes a half of one period of the color subcarrier), an average circuit for averaging the outputs of the delay circuits, a subtraction circuit for subtracting the output of the average circuit from an input video signal, an attenuation circuit for attenuating the output of the subtraction circuit, an addition circuit for adding the output of the attenuation circuit to the input video signal, and an edge detection circuit for detecting the edge of pattern in the input video signal. The attenuation factor of the attenuation circuit is set into zero when the edge of pattern is detected.

Noise reduction circuit

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Yokohama, Japan

Kazuhiro Kaizaki