Nec Corporation

Kazuhiro Ikuina

Yuzo Shimada

Ichiro Hazeyama

Mitsuru Kimura

Masaharu Ito

Kenichi Maruhashi

Kazuaki Utsumi

Keiichi Ohata

Torahiko Kanda

Yasuhiro Otsuka

Takeya Hashiguchi

Hiroyuki Gotoh

Katsuhiro Notsu

A high frequency circuit substrate comprises a first high frequency circuit substrate including at least a first dielectric material layer, a first conductor layer, a second dielectric material layer and a second conductor layer, which are laminated in the named order, the first conductor layer having a first slot formed therein, and the second conductor layer forming a transmission line, the first dielectric material layer having a first opening exposing the first slot at its bottom. The high frequency circuit substrate also comprises a second high frequency circuit substrate including at least a third dielectric material layer, a third conductor layer, a fourth dielectric material layer and a fourth conductor layer, which are laminated in the named order, the third conductor layer having a second slot formed therein, and the fourth conductor layer forming a transmission line, the third dielectric material layer having a second opening exposing the second slot at its bottom. The first high frequency circuit substrate and the first high frequency circuit substrate are bonded to each other in such a manner that the first dielectric material layer and the third dielectric material layer are faced to each other and the first slot and the second slot are electromagnetically coupled, by inserting one side and the other side of a conductor plate having a through hole into the first opening and the second opening, respectively.

High frequency circuit substrate and method for forming the same

An RF package includes a multilayered dielectric substrate, a feed-through, and metal members. First and second dielectric substrates are formed on the multilayered dielectric substrate. The multilayered dielectric substrate has a cavity where a semiconductor element is to be mounted. The feed-through connects the inside and outside of the cavity and is comprised of a coplanar line formed on the first dielectric substrate and an inner layer line obtained by forming the second dielectric substrate on the coplanar line. The coplanar line and the inner layer line share a strip-like signal conductor. The metal members are formed at a connection interface between the coplanar line and the inner layer line on two sides of the signal conductor.

RF package with multi-layer substrate having coplanar feed through and connection interface

A method of manufacturing an ink jet recording head. On one and the other surfaces of an ink supply plate, formed with a plurality of discrete ink supply ports and a corresponding number of discrete nozzle ports, a green sheet for a pressure chamber plate and a green sheet for an ink pool plate are laminated, respectively. The resulting lamination is then sintered. A vibration plate is subsequently adhered to the pressure chamber plate formed by the sintering step and a nozzle plate is adhered to the sintered pool plate.

Method of manufacturing an ink jet recording head

A glass having an oxide-converted composition of 35 to 65 wt % of SiO , 5 to 35 wt % of B O , 2 to 20 wt % of CaO, 5 to 25 wt % of Al O where the ratio of CaO to Al O is 1/1 to 1/2.5, 0.5 to 5 wt % of TiO , 0.5 to 5 wt % of ZrO , 0.5 to 5 wt % of ZnO, 0 to 5 wt % of MgO, 0 to 5 wt % of SrO, 0 to 5 wt % of BaO and 0 to 1 wt % of the total of group 1A element oxides such as Na O, K O and Li O, or a glass having an oxide-converted composition of 10 to 45 wt % of SiO , 20 to 50 wt % of CaO, 20 to 45 wt % of Al O , 0.1 to 5 wt % of MgO, 0.1 to 5 wt % of SrO, 0.1 to 5 wt % of BaO, 0.1 to 5 wt % of TiO , 0.1 to 5 wt % of ZnO, 0.1 to 5 wt % of ZrO and 0 to 3 wt % of a group 1A element oxide has a low glass softening point, can be calcined as a composite with a variety of ceramics at a temperature below 1000&deg; C., precipitates crystals during the calcination process, and can provide a glass ceramic exhibiting a low dielectric constant and a low dielectric loss.

Low-temperature calcined glass ceramic and a manufacturing process therefor

A packaged semiconductor device includes an LSI chip, a chip size package integrally bonded to the LSI chip to mount and hold the LSI chip thereon in order to connect an electrode of a board on which the LSI chip is to be mounted and an electrode of the LSI chip to each other, an electrode formed on a surface of the package opposite to a surface thereof which is bonded to the LSI chip, so as to be connected to the electrode of the board, at least one through hole formed to extend through the LSI chip and the package, and a connecting conductor formed to extend through the through hole in order to connect the electrode of the package and the electrode of the LSI package to each other.

Packaged semiconductor device and method of manufacturing the same

A multilayer glass ceramic substrate having a plurality of conductor layers each laminated through a glass ceramic layer. The glass ceramic layer has a composition comprising of alumina, borosilicate magnesium glass and cordierite crystal produced by chemical reaction between alumina and borosilicate magnesium glass. The content of alumina is 12 to 59.6 wt %, the content of borosilicate magnesium glass is 18 to 69.6 wt %, the content of the cordierite crystal is 1 to 50 wt % and the sum of components is 100 wt %. The multilayer glass ceramic substrate shows improved mechanical strength.

Multilayer glass ceramic substrate and process for producing the same

A glass ceramic substrate is formed on a glass ceramic insulating layer with a conductor connecting a plurality of circuit patterns which are to be independent of each other as to electrical function. Baking the glass-ceramic insulating layer with the conductor, and opening by cutting after baking, forms a plurality of independent circuits with improved electrical resistance between them.

Glass-ceramic substrate and method of producing the same

A low temperature firing glass-ceramic substrate comprising a borosilicate glass, .alpha.-alumina, .gamma.-alumina, and mullite crystals crystallized out in a dispersed form from the borosilicate glass and the .gamma.-alumina, and a production process of the substrate. It is an object of this invention to provide a glass-ceramic substrate, which is low in dielectric constant and dielectric loss and high in strength and is useful for multilayer wiring.

Low temperature firing glass-ceramic substrate and production process

A ceramic substrate for use with a semiconductor device, includes an electrical conductor composed of Ag, a resistor composed of oxide, and a barrier layer located between the electrical conductor and the resistor and composed of a material selected from a group consisting of AgPd and AgPt. The ceramic substrate prevents a diffusion of Ag atoms between the electrical conductor and the resistor, and hence provides a stable internal resistance.

Ceramic substrate for semiconductor device

A multi-layer wiring substrate includes an insulating layer which is essentially formed of a silica sintered product, and a conductor layer formed on an upper surface of the insulating layer from an electrically conductive material. The multi-layer wiring substrate is produced by forming a green sheet from a starting powder such as an ultrafine powder of amorphous silica having an average particle size of several to tens nm, and firing or calcining the green sheet at a temperature of 800.degree. to 1,200.degree. C. in an atmosphere containing steam to provide a silica sintered product which is sintered to a sufficient extent and has a high strength. The starting powder has a composition which comprises 95.0 to 99.5% by weight of a fine silica powder, 0.05 to 5.0% by weight of an alkaline earth metal compound, or comprises 95.0 to 99.0% by weight of a fine silica powder and 1.0 to 5.0% by weight of B.sub.2 O.sub.3. The silica sintered product has a sufficiently high strength and a dielectric constant of 4.0 at 1 MHz.

Multi-layer wiring substrate, and process for producing the same

A process for producing a silica sintered product for a multi-layer wiring substrate of the invention includes: providing a fine silica powder having an average particle size of 5 to 500 nm and a fine crystallized quartz powder having an average particle size 1 to 10 .mu.m, the fine crystallized quartz powder having a volume equal to 1 to 20% of the entire volume of the fine silica powder and the fine crystallized quartz powder; mixing the fine silica powder and the fine crystallized quartz powder with a binder and a solvent to form a silica-containing slurry; forming a green sheet by slip-casting the silica-containing slurry; and firing the green sheet at a temperature of 800.degree. to 1200.degree. C. in an atmosphere containing steam at a partial pressure of 0.005 to 0.85 atm.

Process for producing a silica sintered product for a multi-layer wiring

A multilayer glass ceramic substrate includes a glass ceramic layer and a plurality of conductive layers laminated via the glass ceramic layer. The glass ceramic layer is composed of inorganic compound consisting of aluminum oxide, borosilicate glass, anorthite crystal and celsian crystal wherein the aluminum oxide is contained in the range of 12 to 59.6 weight percent, the borosilicate glass is contained in the range of 18 to 69.6 weight percent, the anorthite crystal is contained in the range of 1 to 40 weight percent and the celsian crystal is contained in the range of 1 to 5 weight percent so that the total is 100 weight percent.

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Tokyo, Japan

Kazuhiro Ikuina