The Furukawa Electric Co., Ltd.

Nippon Electric Co., Ltd.

Nippon Telegraph and Telephone Public Corporation

Kazuhiro Ikeda

Hiroshi Matsuura

Yasuo Sato

Kouzou Kage

Yu Mimura

Yoshio Sato

Takeshi Takagi

Ikio Yoshida

Tatsuya Hatano

The present invention provides a polarization mode dispersion compensator comprising: a compensating portion which includes a first polarization controller which performs polarization conversion on light propagating along an optical transmission line and a DGD (Differential Group Delay) emulator which adds a DGD to the light which is polarization-converted by said first polarization controller, said compensating portion being for compensating polarization mode dispersion which occurs in the light while the light propagates along the optical transmission line; a second polarization controller for performing polarization conversion on the light, of which the polarization mode dispersion is compensated, so that a state of polarization of the light can be one linear polarization; a polarization beam splitting portion for splitting the light, which is polarization-converted by said second polarization controller, into the one linear polarization and an other linear polarization which is orthogonal to the one linear polarization; an optical-intensity measuring portion for measuring intensity of the other linear polarization; and a controlling portion for controlling said compensating portion and said second polarization controller so that the intensity of the other linear polarization measured by said optical-intensity measuring portion becomes minimized.

Polarization mode dispersion compensator, polarization mode dispersion compensating method, and its application to optical communication system

A PMD emulator configured by connecting in this order: an input-side optical fiberfor receiving light to be measured; a first polarization rotating portionincluding M DGD sections(M is an integer equal to or more than 2) concatenated by (M&#x2212;1) polarization rotators, one DGD section being arranged at each end of said first polarization rotating portion; an arbitrary-arbitrary polarization controllerfor changing any state of polarization into any other state of polarization, a second PMD rotating portionconfigured in the same way as the first polarization rotating portionan output-side optical fiber for outputting the light to be measured.

PMD emulator

An object is to accurately measure the Stokes parameters, without the occurrence of polarization fluctuations or PDL during the splitting of the incident light. When the incident light is made incident on a first-stage prism, the light is split into two first splitting light rays. Next, the first split light rays are respectively incident on a pair of prisms of a second stage. Each of the pair of first split light rays is split into two rays by a second-stage prism, to obtain four second split light rays.

Stokes parameter measurement device and method

Between a lens of a collimator and a retro-reflector as a total reflecting element, a prism, a polarizer, a Faraday rotator and a linear retarder are arranged in the order. The core/clad section serving as an input optical fiber of the collimator has its optical axis coincident with an optical axis of the lens. When the light exited the collimator reaches the retro-reflector, the outgoing light reflects deviated by a spacing Y, the returning light of which is refracted by the prism and incident on the core/clad serving as an output optical fiber of the collimator.

Variable optical filter unit and variable gain equalizing system

A wave translating circuit includes a capacitor supplied with an input signal, a first resistor connected between a first potential point and the output of the capacitor, a second resistor connected between a second potential point and the output of the capacitor, and a limiter connected to the output of the capacitor.

Wave translating circuit

A clock regenerator for a binary input which comprises a shift register having successively coupled first stages, a single predetermined stage, and second stages. A frequency divider device responsive to a local oscillation and with a controllable ratio produces timing pulses of a timing period equal to that prescribed number of clock periods which may be unity. Each timing pulse presets a binary signal in the single predetermined stage. The signal is shifted, when a transition occurs in binary values of the input signal within a predetermined interval defined by each timing period. The signal is shifted into the first and second stages if the transition occurs during a leading and a trailing half of each timing period, respectively, the timing pulse thus leading and lagging behind the input signal. The shifted binary signal controls the frequency division ratio to phase-synchronize the timing pulses with the input signal.

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Tokyo, Japan

Kazuhiro Ikeda