Sharp Kabushiki Kaisha Corporation

Kazuhiro Hirohama

Masaru Tanaka

Shinichi Sato

Takeshi Umemoto

Takayoshi Hashimoto

Hideyuki Kanzawa

A method for manufacturing a semiconductor device comprising:

Method for manufacturing semiconductor device

A method of manufacturing a semiconductor device including a first step of depositing a first film and a second film on a conductive layer in this order and etching a desired portion of the second film with a first etching gas until the first film is exposed, the first film being made of one of a silicon nitride film and a silicon nitride oxide film, the second film being made of a silicon oxide film, a second step of removing a reaction product deposited on the first film through the first step with a second etching gas to expose the first film, a third step of etching the first film exposed through the second step with a third etching gas until the conductive layer is exposed and a fourth step of removing a reaction product deposited on the conductive layer through the third step with a fourth etching gas, thereby forming a concave portion penetrating the first and second films to reach the conductive layer surface.

Method of manufacturing semiconductor device

A method for manufacturing a semiconductor device, comprises steps of: (a) forming a gate insulating film on a semiconductor substrate and forming a plurality of gate electrodes having a first insulating film made of a first insulating material thereon and a sidewall spacer made of the first insulating material on its sidewall on said gate insulating film; (b) forming a second insulating film which is made of the first insulating material and which is thinner than said first insulating film on said semiconductor substrate at least in a region where a contact hole is to be formed in the later step; (c) embedding a third insulating film which may become an etching stopper to etching of said first insulating material between said gate electrodes; (d) forming a first resist pattern having a predetermined shape on said semiconductor substrate and etching said second insulating film, first insulating film and sidewall spacer until when said gate electrode is exposed by using said first resist pattern and said third insulating film as mask; (e) forming an interlayer insulating film on said semiconductor substrate; (f) forming a second resist pattern having a predetermined shape on said interlayer insulating film and exposing said second insulating film by etching using said second resist pattern as a mask; and (g) forming the contact hole by removing said second insulating film.

Growing community of inventors

Fukuyama, Japan

Kazuhiro Hirohama