Hitachi, Ltd.

Hitachi Video Engineering, Incorporated

Hitachi Engineering Ltd

Kazuhiro Fujisawa

Hiroyuki Mano

Tatsuhiro Inuzuka

Satoshi Konuma

Satoru Tsunekawa

Kiyoshige Kinugawa

Terumi Takashi

Toshio Futami

Kaoru Hasegawa

Shinzo Matsumoto

Mitsuhisa Fujita

A liquid crystal display apparatus including a liquid crystal panel of a plurality of dots, an X drive circuit for supplying display information of at least one line to the liquid crystal panel and a Y drive circuit for selecting one-dot data for each line of the liquid crystal panel, the X drive circuit and the Y drive circuit enabling energization of the liquid crystal panel. A plurality of memories are provided for receiving a plurality of bits of information data and for storing at least M dot display information data so as to enable display of a respective line of the liquid crystal panel, M being an integer. A selection arrangement is provided for selecting one bit of display information dat out of a plurality of bits of display information data to be read out of the memories and a selection controller is provided for specifying the one bit of display information data to be selected by the selection arrangement so as to enmable read out of each one bit of the plurality of bits in a predetermined time sequence corresponding to one horizontal perioid divided by N for display, where N is an integer of at least two. The X drive circuit is supplied one dot information at leat two times during the one horizontal period so that one dot is controlled for display at least two times during the one horizontal period to enable multi-level tone display.

Method and apparatus for multi-level tone display for liquid crystal

A liquid crystal display system capable of making a display of 2.sup.i+j (i, j: positive integers) kinds of tones display includes a frame rate control device for selecting one out of frame rate control data of 2.sup.j kinds in accordance with j-bit display data included in (i+j)-bit display data, i and j being positive integers, a multi-level tone pulse generator for generating display pulses of 2.sup.i +1 kinds including at least activation for display, inactivation for display, and intermediate display corresponding to an intermediate level, and a selection drive device for selecting a display pulse of one kind out of display pulses of 2.sup.i +1 kinds in accordance with the frame rate control data supplied from the frame rate control device and i-bit display data and applying the selected display pulse to a liquid crystal panel, the i-bit being different from the j-bit.

Liquid crystal display method and apparatus capable of making

A liquid crystal display apparatus in which color display information is converted into information about luminance of liquid crystal display used for driving a liquid crystal so as to provide a liquid crystal display. The apparatus comprises a decider unit for deciding whether the color display information takes a display form pursuant to the dither method, and a converter unit for converting the color display information into liquid crystal luminance display information in accordance with a frame base thin-out method corresponding to the color display information when the decision results indicate that the color display information takes a display form pursuant to the dither method and for converting the color display information in accordance with a dot base thin-out method when the decision results do not indicate the dither method.

Liquid crystal display apparatus and method of performing liquid crystal

A liquid crystal display apparatus including a liquid crystal panel of a plurality of dots, an X drive circuit for supplying display information of at least one line to the liquid crystal panel and a Y drive circuit for selecting one-dot data for each line of the liquid crystal panel, the X drive circuit and the Y drive circuit enabling energization of the liquid crystal panel. A plurality of memories are provided for receiving a plurality of bits of information data and for storing at least M dot display information data so as to enable display of a respective line of the liquid crystal panel, M being an integer. A selection arrangement is provided for selecting one bit of display information data out of a plurality of bits of display information data to be read out of the memories and a selection controller is provided for specifying the one bit of display information data to be selected by the selection arrangement so as to enable read out of each one bit of the plurality of bits in a predetermined time sequence corresponding to one horizontal perioid divided by N for display, where N is an integer of at least two. The X drive circuit is supplied one dot information at leat two times during the one horizontal period so that one dot is controlled for display at least two times during the one horizontal period to enable multi-level tone display.

In accordance with a write address successively updated in synchronism with a dot clock, color display data is written into a memory. The memory includes three memory corresponding to three primary colors and having identical addresses thereto assigned. For the purpose of color display, the written display data is read out three times consecutively during one write clock interval. A read address generator for supplying a read address successively changed to the memory is reset when addresses have been generated up to the number of horizontal display dots. The resetting is performed when the number of horizontal display dots detected from the dot clock and a display timing signal has coincided with a read address signal outputted from the read address generator. Since the reset timing of the read address generator changes according to the number of horizontal display dots detected by horizontal display dot number detector, it is possible to cope with a change of the personal computer supplying input data without changing the circuit.

Matrix display apparatus and display data supply circuit for storing

In a half tone display driving circuit for a liquid crystal matrix panel, a pulse for half tone display is phase modulated so that pulse signals which are out of phase relative to each other are applied to adjacent columns of the liquid crystal matrix panel, or from the phase-modulated pulse a gray scale pulse (tone pulse) is prepared in which the frequency of occurrence of voltage edges is decreased. The dephased pulse signals or the gray scale pulse (tone pulse) is used to prevent a decrease in brightness of display when the liquid crystal matrix panel is driven for half tone display.

Half tone display driving circuit for crystal matrix panel and half tone

An apparatus for driving a color display panel operating at a high frame frequency. The color display panel driving apparatus includes a line memory for storing data of 1/2 of a line at its odd-numbered addresses and then storing data of the remaining 1/2 of the line at its even-numbered addresses, a first column drive circuit including a shift register to which the data stored at the odd-numbered addresses of the line memory are supplied and which is connected at its bit outputs to column-direction signal wires associated with a left-hand half display area of the display panel, and a second column drive circuit including a shift register to which the data stored at the even-numbered addresses of the line memory are supplied and which is connected at its bit outputs to column-direction signal wires associated with a right-hand half display area of the display panel. After picture data of one line are completely stored in the line memory, the picture data are substantially simultaneously supplied from the odd-numbered and even-numbered addresses of the line memory to the first and second column drive circuits respectively.

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Fujisawa, Japan

Kazuhiro Fujisawa