Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Kazuhiko Nishikawa

Takahiro Bokui

Seiji Watanabe

Shiro Dosho

Naoshi Yanagisawa

Haruhisa Takata

In a parameter correction circuit in an LSI, a reference resistor element with high precision having a resistance value set to a target value is connected to an external terminal of the LSI. A constant current from a mirror circuit connected to a current supply flows through the reference resistor element. A voltage value generated in the reference resistor element is measured by a voltage measuring circuit. The constant current also flows through a variable resistor element. The resistance value of the variable resistor element is adjusted so that a voltage generated in the variable resistor element corresponds to the voltage generated by the reference resistor element.

Parameter correction circuit and parameter correction method

The successive comparison analog-to-digital (A-D) converter includes a plurality of capacitors, a plurality of first analog switches, a plurality of second analog switches, a plurality of third analog switches, a voltage comparator, and a state controller. Each of the plurality of capacitors has a capacitance weighted with a prescribed weighting factor. Each of the plurality of first analog switches has an on-state resistance weighted with a prescribed weighting factor. In the successive comparison A-D converter, a first analog switch corresponding to a capacitor having a capacitance weighted with a larger weighting factor has an on-state resistance weighted with a smaller weighting factor, whereby a time constant for this capacitor can be reduced. As a result, the difference in time constant between the capacitors is reduced. This enables reduction in time required to precharge (sample and hold) an analog input, improving the A-D conversion speed.

Successive comparison analog-to-digital converter

A jitter detector obtains a phase difference between input signals as a digital value to make jitter between the signals easily detectable. The jitter detector includes comparison pulse generator, periodic signal generator, counter and arithmetic unit. The comparison pulse generator outputs one phase difference comparison pulse after another. Each phase difference comparison pulse has a width representing the phase difference between first and second input signals. The periodic signal generator outputs a periodic signal every time a value obtained by accumulating the widths of the phase difference comparison pulses exceeds a predetermined value. Receiving the periodic signal and a clock signal with a period shorter than that of the periodic signal, the counter counts the number of pulses of the clock signal during one period of the periodic signal and outputs a resultant count. And the arithmetic unit detects and outputs a variation in the count as jitter between the first and second input signals.

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Osaka, Japan

Kazuhiko Nishikawa