Hitachi, Ltd.

Renesas Technology Corp.

Hitachi Engineering Co., Ltd.

Hitachi Microcomputer System, Ltd.

Kazuhiko Kawai

Masaaki Shida

Takao Kobayashi

Sukeyoshi Tsunekawa

Haruo Itoh

Akio Saito

Maki Shimoda

Katsuhiko Itoh

Yasuo Nagai

Koutarou Koizumi

A demodulating semiconductor integrated circuit device used in a wireless communication system of an FM-modulation scheme, wherein a circuit for canceling a frequency offset is made of a digital circuit, so as to make a high-accuracy decision as to received data and prevent error frequency offset cancel due to a pseudo pattern contained in the received data. Consequently, a high-accuracy received data decision is carried out.

Frequency offset cancellation circuit for data determination in wireless communications

Frequency offset cancellation circuit for data determination in FM wireless communications

According to the present invention, the surface of the sample is cleaned with water immediately after ashing of the resist the quality of which has been changed through ion implantation by ozone-containing gas, or ozone-containing gas and ultraviolet ray, or the sample is cleaned with water without being exposed to the atmosphere after ashing, thereby allowing the number of residues to be reduced to 1/100, decreasing the load in cleaning process by solution, cutting down the semiconductor device production cost and improving the semiconductor device productivity.

Removal method of organic matter and system for the same

A detecting circuit for detecting electric abnormality of a pair of feeders is provided with resistors R.sub.A and R.sub.B converting the abnormality of the feeders into a change in voltage, transistors (Q.sub.8, Q.sub.9 and Q.sub.10) supplying or interrupting a current I.sub.B in response to presence or absence of an abnormal state, transistors (Q.sub.5, Q.sub.6 and Q.sub.17) drawing in or blocking a current I.sub.A in response to the abnormal state, a current subtraction element (I) conducting a subtraction of the currents I.sub.B and I.sub.A on an absolute value basis, a current addition element (II) conducting an addition of the currents I.sub.A and I.sub.B, a current addition element (III) adding the output currents of the current subtraction element (I) and current addition element (II), and a voltage comparator (6) subjecting the output current of the current addition element (III) to current-voltage conversion and comparing a voltage thus obtained with a reference voltage so as to obtain an abnormality detection signal, which is used to interrupt the feeding of electricity to the paired feeders when an abnormality is detected.

Circuit for detecting abnormality in feeder

Growing community of inventors

Takasaki, Japan

Kazuhiko Kawai