Toshiba Ceramics Co., Ltd.

Covalent Materials Corporation

Globalwafers Japan Co., Ltd.

The Furukawa Electric Co., Ltd.

Kazuhiko Kashima

Koji Izunome

Takeshi Senda

Susumu Maeda

Hiromichi Isogai

Eiji Toyoda

Koji Araki

Haruo Sudo

Tatsuhiko Aoki

Kumiko Murayama

Akihiko Kobayashi

Hiroshi Shirai

Reiko Yoshimura

Tsukasa Tada

Jun Yoshikawa

Masayuki Watanabe

Kazumoto Homma

Yasuo Uemura

Shin'ichiro Takasu

Michihiro Ohwa

Eiichi Toji

Hiroyuki Saito

Satoko Nakagawa

Norihiro Shimoi

Masayuki Sanada

Youji Ogawa

Shuji Tobashi

Kazuya Ookubo

Yukari Kohtari

Senlin Fu

Hiroyuki Fujimori

Junichi Osanai

Toshiyuki Inukai

Yoichiro Mochizuki

Yuta Nagai

Mitsuo Higasa

According to an embodiment, a method of forming a calibration curve is provided. The method includes ion-implanting different doses of an impurity into a plurality of first samples, measuring an intensity of photoluminescence deriving from the impurity by a photoluminescence spectroscopy for the first samples and a second sample made of the same semiconductor. Based on the amount of implanted impurity, the intensity of the photoluminescence, and a concentration of the impurity contained in the second sample measured by a method other than the photoluminescence spectroscopy, a calibration curve is formed.

Calibration curve formation method, impurity concentration measurement method, and semiconductor wafer manufacturing method

A silicon wafer for preventing a void defect in a bulk region from becoming source of contamination and slip generation in a device process is provided. And a heat-treating method thereof for reducing crystal defects such as COP in a region near the wafer surface to be a device active region is provided. The silicon wafer has a surface regionwhich is a defect-free region and a bulk regionincluding void defect of a polyhedron whose basic shape is an octahedron in which a corner portion of the polyhedron is in the curved shape and an inner-wall oxide film the void defect is removed. The silicon wafer is provided by performing a heat-treating method in which gas to be supplied, inner pressure of spaces and a maximum achievable temperature are set to a predetermined value when subjecting the silicon wafer produced by a CZ method to RTP.

Silicon wafer and method for heat-treating silicon wafer

A silicon wafer produced from a silicon single crystal ingot grown by Czochralski process is subjected to rapid heating/cooling thermal process at a maximum temperature (T) of 1300&#xb0; C. or more, but less than 1380&#xb0; C. in an oxidizing gas atmosphere having an oxygen partial pressure of 20% or more, but less than 100%. The silicon wafer according to the invention has, in a defect-free region (DZ layer) including at least a device active region of the silicon wafer, a high oxygen concentration region having a concentration of oxygen solid solution of 0.7&#xd7;10atoms/cmor more and at the same time, the defect-free region contains interstitial silicon in supersaturated state.

Method of manufacturing single crystal silicon wafer from ingot grown by Czocharlski process with rapid heating/cooling process

The invention is to provide a method for heat treating a silicon wafer reducing grown-in defects while suppressing generation of slip during RTP and improving surface roughness of the wafer. The method performing a first heat treatment while introducing a rare gas, the first heat treatment comprising the steps of rapidly heating the wafer to Tof 1300&#xb0; C. or higher and the melting point of silicon or lower, keeping the wafer at T, rapidly cooling the wafer to Tof 400-800&#xb0; C. and keeping the wafer at T; and performing a second heat treatment while introducing an oxygen gas in an amount of 20-100 vol. %, the second heat treatment comprising the steps of keeping the wafer at T, rapidly heating the wafer from Tto Tof 1250&#xb0; C. or higher and the melting point of silicon or lower, keeping the wafer at Tand rapidly cooling the wafer.

Method for heat treating a silicon wafer

In a method of heat treating a wafer obtained by slicing a silicon single crystal ingot manufactured by the Czochralski method, a rapid heating/cooling heat treatment is carried out by setting a holding time at an ultimate temperature of 1200&#xb0; C. or more and a melting point of silicon or less to be equal to or longer than one second and to be equal to or shorter than 60 seconds in a mixed gas atmosphere containing oxygen having an oxygen partial pressure of 1.0% or more and 20% or less and argon, and an oxide film having a thickness of 9.1 nm or less or 24.3 nm or more is thus formed on a surface of the silicon wafer.

Method of heat treating silicon wafer

In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300&#xb0; C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.

Manufacturing method for silicon wafer

The present invention provides a fiber Bragg grating element which is simply configured and capable of obtaining a high cut-off amount exceeding 40 dB in a wide range. A fiber Bragg grating element of the present invention has a plurality of gratings formed in an optical waveguide having a core and a cladding around the core thereby to perform high rejection filtering on an input optical signal over a desired bandwidth&#x2dc; the gratings being formed with a grating pitch between adjacent two of the gratings increasing toward a center in a longitudinal direction of the optical waveguide.

Fiber Bragg grating element

A semiconductor substrate includes a support substratehas gettering sitesfor gettering impurity metal, an embedded insulating filmwhich is provided on the support substrateand contains oxides of an element whose single bond energy to oxygen is higher than that to silicon, and a semiconductor layer (an SOI layer)provided on the embedded insulating film

Semiconductor substrate comprising a support substrate which comprises a gettering site

At the time of fabricating a silicon single crystal wafer from a nitrogen-doped silicon single crystal grown according to the Czochralski method, a silicon single crystal wafer covered with a region in which an oxygen precipitation bulk micro defect and an oxidation induced stacking fault mixedly exist is subjected to heat treatment at a temperature of 1100 to 1300&#xb0; C. in a reducing gas or inert gas atmosphere. In such a manner, a method of fabricating a high-quality silicon single crystal wafer and a silicon single crystal wafer in which no grown-in crystal defects exist in the whole surface and oxygen precipitation bulk micro defects (BMD) are formed at a sufficiently high density to display the IG effect on the inner side can be provided. The single crystal wafer can be suitably used to form an operation region of a semiconductor device.

Silicon single crystal wafer fabricating method and silicon single crystal wafer

A silicon wafer is mirror-polished until obtaining surface roughness Ra of 0.70-1.00 nm, Rq of 0.80-1.10 nm, or Rt of 4.50-7.00 nm. The resulting wafer is heat-treated at a temperature not lower than 1,200.degree. C. for 30 minutes to 4 hours in a hydrogen gas atmosphere. According to another aspect, a silicon wafer is mirror-polished until obtaining surface roughness values Ra' of 0.08-0.70 nm, rms of 0.10-0.90 nm, and P-V of 0.80-5.80 nm in a square area of 90 .mu.m by 90 .mu.m, and surface roughness values Ra' of 0.13-0.40 nm, rms of 0.18-0.50 nm, and P-V of 1.30-2.50 nm in a square area of 500 nm by 500 nm. The resulting wafer is heat-treated at 1,100.degree.-1,300.degree. C. for 30 minutes to 4 hours in a hydrogen gas atmosphere.

Silicon wafer manufacturing method eliminating final mirror-polishing

A silicon wafer and a method of producing a silicon wafer comprising a phosphor-doping method of doping phosphor into a single silicon crystals by transmuting isotope Si.sup.30 contained in said single silicon crystals made by the CZ method or the MCZ method into p.sup.31 under neutron irradiation to said single silicon crystals.

Neutron transmutation doping of a silicon wafer

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Hadano, Japan

Kazuhiko Kashima