Mitsubishi Electric Corporation

The University of Tokyo

Kazuhide Higuchi

Kenichi Tajima

Morishige Hieda

Hiroyuki Mizutani

Ken Takeuchi

Takuya Suzuki

Nobuhiko Ando

Koji Tsutsumi

Mayumi Fukuda

Jun Shimokawatoko

The radar device is provided with a distance calculation unit that calculates a distance correspondence value corresponding to the distance to a target from a digital signal converted by a beat signal detection unit, and calculates the distance to the target from the distance correspondence value.

Radar device

A signal generating circuit includes a control voltage setting unit (CVSU) configured to set a control voltage for a chirp signal using voltage-frequency characteristics indicating characteristics of an output frequency versus voltage; a VCO configured to alter the frequency of its output signal by the control voltage; a quadrature demodulator configured to perform quadrature demodulation of the output signal of the VCO to generate an inphase signal and a quadrature signal orthogonal to each other; and a frequency detector configured to detect the frequency of the output signal of the VCO on the basis of the inphase signal and quadrature signal. The CVSU corrects the control voltage by using the voltage-frequency characteristics derived from relationships between the control voltage and the frequency of the output signal of the VCO. The VCO generates the chirp signal based on the control voltage corrected by the CVSU.

Signal generating circuit

Filter circuitry is constituted by transversal filters which are connected in parallel to each other. The transversal filters change amplitude and a phase of an input digital signal X[n&#xb7;T] and output different digital signals X[n&#xb7;T], X[n&#xb7;T], and X[n&#xb7;T] as respective resulting digital signals whose amplitude and phase have been changed. A phase frequency computer computes a phase &#x3b8;[n&#xb7;T] and a frequency f[n&#xb7;T] of the input digital signal X[n&#xb7;T] by performing phase computation and frequency computation using the digital signals X[n&#xb7;T], X[n&#xb7;T], and X[n&#xb7;T] output by the transversal filters.

Phase frequency detection device

When write request signal is input from a host device, an SSD inputs data input from the host device in an encoder sequentially and controls a RRAM to store data output from the encoder. When size of data stored in the RRAM reaches predetermined size Sref, the SSD controls the RRAM to read out data of size of the predetermined size Sref, inputs read data from the RRAM in the encoder, and controls a flash memory to store data output from the encoder. This configuration accomplishes the increase of the data write speed and improvement of reliability of the data.

Data storage device and control device configured to control data transfer between a host device, a first storage, and a second storage

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Tokyo, Japan

Kazuhide Higuchi