Kabushiki Kaisha Toshiba

Toshiba Mitsubishi-electric Industrial Systems Corporation

Kazuhide Ashida

Kenji Sato

Akira Nojima

Norio Shimizu

Shinichiro Kosugi

Masahiro Sekino

Nobuo Shibuya

Ryuichi Morikawa

Kenji Shigehisa

Nagaaki Muro

Shun Egusa

Tsutomu Kanetsuna

Yoichi Takayanagi

Yuusaku Hata

Provided is a battery system capable of preventing the voltage that is applied to the voltage detection circuit from exceeding the withstand voltage of the voltage detection circuit when the connection between the cells in the battery module is disconnected, and preventing an overcurrent from flowing in the cell voltage detection circuit and the module. The modules are internally provided with a battery voltage measurement circuitfor measuring the voltage of each cell. A reverse voltage protective diodeis disposed in the power supply route of the battery voltage measurement circuit, and adapted such that the anode thereof is connected to the negative electrode of a drive power source of the voltage measurement circuit and the cathode thereof is connected to the positive electrode of the drive power source of the voltage measurement circuit. A fuseas an overcurrent protective element is provided to the power supply route of the battery voltage measurement circuit

Battery system

A battery pack includes: a plurality of rechargeable batteries (to) connected in series or in parallel; a voltage detector () for detecting voltages of the respective batteries; a calculator () for calculating optimal charging current values based on the voltages of the respective batteries detected by the voltage detector so as to recharge the respective batteries; and a communicator () for transmitting the charging current values calculated by the calculator to a battery charger ().

Battery pack, battery charger, and battery pack system

A power supply connector is provided, which is applicable to both large current charging and low current charging, the power supply connector being able to not only maintain the accuracy of monitoring low current charging and the volumetric efficiency of a board by appropriately arranging two types of connector parts, but also contribute to the downsizing of the power supply connector and improvement of the reliability thereof by striking a balance between the volumetric efficiency and the heat radiation characteristics, and ensure safety in the use of the power supply connector while reducing the cost. Insertion holesand connector pinsthat configure a large current charging connector part are disposed in the vicinity of both ends of the power supply connector. There are disposed a plug insertion holeand low current charging connector pinsthat configure a low current charging connector part held between the insertion holesand the connector pins

Power supply connector

A control apparatus with a fast I/O function is adapted for storage of a control program, and to input a status of a target to be controlled as an input data from an I/O device, follow the control program to execute an operation of the input data, and output to the I/O device a result of the operation as an output data for controlling the target to be controlled, and includes a batch I/O buffer memoryhaving an output data register for storing an output data of the I/O device, and a batch I/O buffer memory controllerfor controlling a writing of output data to be written to the batch I/O buffer memory, the batch I/O buffer memory controllerbeing adapted to control the writing of output data to the batch I/O buffer memory in accordance with a comparison output of control data of a control program executing circuit

Control apparatus with fast I/O function, and control method for control data thereof

A control apparatus which generates control information on the basis of control target information from a control target, controls the control target by using the generated control information, and transmits the control information to an off-system control apparatus, includes a single common memory which stores both the control target information from the control target, and the transmitted control information.

Control apparatus

A managing method is provided for an information processor system consisting of a plurality of information processors. In the system, each of the information processors has identification information containing a parameter for determining a master-slave relationship among the information processors and an algorithm for determining the master-slave relationship. When the information processors communicate with each other, an information processor exchanges its own identification information with the identification information of the other information processor and further makes a response of information processing on the basis of the identification information brought from the other information processor.

Managing method for determining master-slave relationship in information processor system

An integrated controller, including a plurality of controllers, each of the controllers executing a different program, and an integrator configured to imaginarily integrate the controllers as a single controller.

Integrated controller, integrated control system and transmission controller

An enhanced programmable controller for enabling access to data using internal variable names and public variable names on a communication control interface. The enhanced programmable controller includes a data storage device for storing data required for control. A program memory stores a sequential program. A communication interface communicate with other programmable controllers. A central processing unit executes the sequential program and controls a variable name conversion unit. The variable name conversion unit converts variable names, that are actual functional names, into physical addresses when variable name access is demanded from other programmable controllers.

Programmable controller data communications using variable names associated with data addresses

A programmable controller includes a master CPU for processing data in accordance with a predetermined program including a prescribed sequence of operating steps, a plurality of operating devices responsive to the master CPU, each having at least two operating states, a monitor device for displaying the execution state of a predetermined number of steps in response to batch processing by the master CPU, and a slave CPU. The slave CPU includes a command execution circuit for generating command output information in response to the execution of each operating step, a register for storing the command output information and the operating state of selected operating devices, and a counter for counting the predetermined number of executed operating steps in the sequence of the program.

Growing community of inventors

Nagano, Japan

Kazuhide Ashida