Hewlett-packard Company

Kay C Lannen

David W Webb

Katherine Z Withers-Miklos

Amanda L Constant

Ted T Turner

Amos H-k Leong

Sharon E LaTourrette

Walter L Gregory, Jr

Jay M Stepleton

Amos Hong-Kiat Leong

Jeffrey C Myers

Davis M Glasgow

A system and method for testing an electronic circuit is disclosed. The system includes a circuit board test platform having multiple electronic test capabilities and multiple hardware resources, and a pay-per-use module that is coupled to the circuit board test platform. The pay-per-use module is adapted for monitoring use of the multiple electronic test capabilities and the hardware resources of the circuit board test platform, and for debiting a number of usage credits from a usage credit pool based on the use of the multiple electronic test capabilities and the tester hardware resources.

Pay-per-use access to multiple electronic test capabilities and tester

A system and method for testing an electronic circuit is disclosed. The system includes a circuit board test platform having multiple electronic test capabilities, and a pay-per-use module that is coupled to the circuit board test platform. The pay-per-use module is adapted for monitoring use of the multiple electronic test capabilities of the circuit board test platform, and for debiting a number of usage credits from a usage credit pool based on the use of the multiple electronic test capabilities.

Pay-per-use access to multiple electronic test capabilities

A system and method for calibrating testers. A reference timing signal and an internal timing signal used in tester calibration are generated within a tester. A first calibration is performed wherein test module channel characteristics are measured and recorded, and an adjustment value is determined to correct the time placement of the internal timing signal. Driver and receiver delays are adjusted based on the characteristics measured in this first calibration, and the internal timing signal is adjusted as well. A second calibration is performed wherein temporal relationships between the adjusted internal timing signal and signals at the test module channel mint pins are determined. Driver and receiver delays are adjusted based on the results of this calibration. An optional calibration is performed wherein temporal relationship between the adjusted internal timing signal and signals at the board-interface end of a test fixture are measured. Using these measurements and the measurements obtained in the second calibration, a test fixture characterization is performed and recorded. Delays of the drivers and receivers are again adjusted to account for the fixture characteristics. Additional calibration methods provided by the present invention include a manual multi-module calibration to keep test module channels aligned when a new module is designated as the master module, and a manual synchronization clock calibration to deskew drivers and receivers relative to an external clock supplied by the device under test.

Tester calibration procedure which includes fixturing

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Fort Collins, CO, United States of America

Kay C Lannen