Destination 2D Inc.

University of California

Kaustav Banerjee

Brian Cronquist

Ravi Iyengar

Satish Sundar

Wei Cao

Junkai Jiang

Kunjesh Agashiwala

Chao-Hui Yeh

Arnab Pal

Klaus Schuegraf

An MLG (multilayer graphene) device layer structure is connected with a via. The structure includes an M1 MLG interconnect device layer upon a dielectric layer. Interlayer dielectric isolates the M1 MLG interconnect device layer. An M2 MLG interconnect device layer is upon the interlayer dielectric. A metal via penetrates through the M2 MLG interconnect device layer, the interlayer dielectric and the M1 MLG interconnect device layer and makes edge contact throughout the thickness of both M1 MLG and M2 MLG layers. A method diffuses carbon from a solid phase graphene precursor through a catalyst layer to deposit MLG on a dielectric or metal layer via application of mechanical pressure at a diffusion temperature to form MLG layers.

CMOS-compatible graphene structures, interconnects and fabrication methods

A conducting thin film structure or pattern which facilitates the insertion of dopant atoms, ions, or molecules into layered 2D materials including: a layered 2D material, an electrically isolative material disposed below the layered 2D material, where the layered 2D material has at least one layer, where the layered 2D material includes slots, where the slots include etched regions where the layered 2D material is at least partially etched away, where the etched regions include a width greater than 0.5 nm and less than 1 meter, where the layered 2D material is intercalation doped with at least one dopant, where the at least one dopant includes at least one intercalation doping agent, where the layered 2D material with the slots is fully intercalation doped (stage-1 intercalation) or partially intercalation doped, where a first portion of the layered 2D material is doped p-type, and a second portion is doped n-type.

Techniques, methods, and structures for rapid and efficient intercalation-doping of large-area multi-layered graphene sheets for transparent conductor applications, including solar cells and displays

A diffusion-couple synthesis method using a graphene synthesis tool (GST) including: providing a substrate-load (SL) which includes first-prepared substrate (fPS) and second-prepared-substrate (sPS), where fPS includes a first-carbon-source (fCS), a first-sacrificial-diffusion layer (fSDL), and a first-device-level (fDL), where a first-dielectric-layer (fDiLy) is disposed atop fDL, where fSDL is disposed directly atop fDiLy, where fCS is disposed directly atop the fSDL, and where the sPS includes a secondCS, a secondSDL, and a secondDL, where secondDL is disposed atop the secondDL, where the secondSDL is disposed atop secondDiLy, where secondCS is disposed atop secondSDL; providing a GST capable of applying pressure and temperature to SL within a process chamber (PC); placing SL within PC; applying the pressure and the temperature to SL, where sPS is inverted and disposed above fPS, where fCS is in direct contact with secondCS; forming graphene at a first interface between the fDiLy and the fSDL and at a second interface between secondDiLy and secondSDL.

Throughput improvements for low-temperature/beol-compatible highly scalable graphene synthesis methods including processing in retasked tools

A transparent or semi-transparent conducting thin film structure or pattern which facilitates the insertion of dopant atoms, ions, or molecules into layered 2D materials, the film structure including: a planar sheet of layered 2D material, the layered 2D material having at least one layer disposed in a respective plane, an electrically isolative material, where the electrically isolative material is disposed below the layered 2D material, where the layered 2D material has at least one layer, where the layered 2D material is divided into islands of the 2D material, where separation of the islands of 2D material with respect to each other is greater than 0.5 nm and less than 1 meter, and where the islands of 2D material are intercalation doped with at least one dopant, and where the at least one dopant includes intercalation doping agents.

A diffusion-couple synthesis method using a graphene synthesis tool (GST) including: providing a substrate-load (SL) which includes first-preparedsubstrate (fPS) and second-prepared-substrate (sPS), where fPS includes a first-carbon-source (fCS), a first-sacrificial-diffusion layer (fSDL), and a first-device-level (fDL), where a first-dielectric-layer (fDiLy) is disposed atop fDL, where fSDL is disposed directly atop fDiLy, where fCS is disposed directly atop the fSDL, and where the sPS includes a secondCS, a secondSDL, and a secondDL, where secondDL is disposed atop the secondDL, where the secondSDL is disposed atop secondDiLy, where secondCS is disposed atop secondSDL; providing a GST capable of applying pressure and temperature to SL within a process chamber (PC); placing SL within PC; applying the pressure and the temperature to SL, where sPS is inverted and disposed above fPS, where fCS is in direct contact with secondCS; forming graphene at a first interface between the fDiLy and the fSDL and at a second interface between secondDiLy and secondSDL.

A hybrid switch and memory cell includes a transistor device that has an atomically-thin semiconductor material channel, source/drain electrodes, and gate dielectric. The cell includes a resistive-random-access-memory having a thin conductive edge and a 2D insulator layer over the thin conductive edge, wherein the 2D insulator layer extends over the semiconductor channel and serves as the gate dielectric in the transistor device.

Hybrid transistor and memory cell

A method is described for migration of a deposition material across a diffusion couple deposited on a substrate to a substrate surface including: using a reactor system to facilitate the migration of one or more diffusion materials across a diffusion couple to a substrate by applying a specified pressure to facilitate the migration of the one or more diffusion materials across the diffusion couple to the substrate, where the specified pressure has a value between 14.5 psi and 125 psi, and applying a temperature to facilitate the migration of the one or more diffusion materials across a diffusion couple to the substrate, where the heatable top disk is controlled at a temperature between 25° C. and 500° C. and the heatable bottom disk is controlled at a temperature between 25° C. and 500° C., and where graphene is formed on the substrate surface.

Methods of low-temperature/BEOL-compatible highly scalable graphene synthesis

In one aspect, a highly scalable diffusion-couple apparatus includes a transfer chamber configured to load a wafer into a process chamber. The process chamber is configured to receive the wafer substrate from the transfer chamber. The process chamber comprises a chamber for growth of a diffusion material on the wafer. A heatable bottom disk includes a first heating mechanism. The heatable bottom disk is fixed and heatable to a specified temperature. The wafer is placed on the heatable bottom disk. A heatable top disk comprising a second heating mechanism. The heatable top disk is configured to move up and down along an x axis and an x prime axis to apply a mechanical pressure to the wafer on the heatable bottom disk. While the heatable top disk applies the mechanical pressure, a chamber pressure is maintained at a specified low value. The first heating mechanism and the second heating mechanism can be independently tuned to any value in the working range.

Low-temperature/beol-compatible highly scalable graphene synthesis tool

An interconnection structure, including: a first BEOL (Back-End-Of-Line) level which includes a first MLG (Multi-Layer Graphene) layer which includes at least one first line structure of MLG material; and a first isolation layer which includes an electrically isolating material and is disposed above and beside the at least one first line structure of MLG material; a second BEOL level which includes a second MLG layer (includes MLG material) disposed above the first isolation layer; a connection path electrically connecting first MLG layer to second MLG layer; and at least one via with serrated edges mitigating misalignment impacts and providing low via to line contact resistance, where the connection path includes one of the at least one via, where a width of the at least one first line structure of MLG material is greater than a diameter of the one of the at least one via, and where both MLG layers are intercalation doped.

Graphene BEOL integration interconnection structures

In one aspect, a highly scalable diffusion-couple apparatus includes a transfer chamber configured to load a wafer into a process chamber. The process chamber is configured to receive the wafer substrate from the transfer chamber. The process chamber comprises a chamber for growth of a diffusion material on the wafer. A heatable bottom substrate disk includes a first heating mechanism. The heatable bottom substrate disk is fixed and heatable to a specified temperature. The wafer is placed on the heatable bottom substrate disk. A heatable top substrate disk comprising a second heating mechanism. The heatable top substrate disk is configured to move up and down along an x axis and an x prime axis to apply a mechanical pressure to the wafer on the heatable bottom substrate disk. While the heatable top substrate disk applies the mechanical pressure a chamber pressure is maintained at a specified low value. The first heating mechanism and the second heating mechanism can be independently tuned to any value in the working range.

Growing community of inventors

Goleta, CA, United States of America

Kaustav Banerjee