Novellus Systems Incorporated

Lam Research Corporation

Kaushik Chattopadhyay

Bart Jan Van Schravendijk

Mandyam Sriram

Hui-Jung Wu

Yongsik Yu

Thorsten B Lill

Harmeet Singh

Roey Shaviv

Vahid Vahedi

Thomas W Mountsier

Sirish K Reddy

Joydeep Guha

Aaron Eppler

Keith Fox

Tom Mountsier

Yunsang Kim

Girish Anant Dixit

Gregory Sexton

Youn Gi Hong

Elizabeth Apen

Kimberly Branshaw

Kimberly Shafi

A method for etching features in an OMOM stack with first layer of silicon oxide, a second layer of a metal containing material over the first layer, a third layer of silicon oxide over the second layer, and a fourth layer of a metal containing material over the third layer is provided. A hardmask is formed over the stack. The hardmask is patterned. The OMOM stack is etched through the hardmask.

High aspect ratio etch of oxide metal oxide metal stack

The embodiments disclosed herein pertain to methods and apparatus for depositing stress compensating layers and sacrificial layers on either the front side or back side of a substrate. In various implementations, back side deposition occurs while the wafer is in a normal front side up orientation. The front/back side deposition may be performed to reduce stress introduced through deposition on the front side of the wafer. The back side deposition may also be performed to minimize back side particle-related problems that occur during post-deposition processing such as photolithography.

Back side deposition apparatus and applications

A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.

High aspect ratio etch with combination mask

Protective self aligned buffer (PSAB) layers are layers of material that are selectively formed at the surface of metal layers in a partially fabricated semiconductor device. In a Damascene interconnect, PSAB layer typically resides at an interface between the metal layer and a dielectric diffusion barrier layer. PSAB layers promote improved adhesion between a metal layer and an adjacent dielectric diffusion barrier layer. Further, PSAB layers can protect metal surfaces from inadvertent oxidation during fabrication process. A PSAB layer may be formed entirely within the top portion of a metal layer, by, for example, chemically converting metal surface to a thin layer of metal silicide. Thickness of PSAB layers, and, consequently resistance of interconnects can be controlled by partially passivating metal surface prior to formation of PSAB layer. Such passivation can be accomplished by controllably treating metal surface with a nitrogen-containing compound to convert metal to metal nitride.

Protective self-aligned buffer layers for damascene interconnects

Stability of an underlying dielectric diffusion barrier during deposition and ultraviolet (UV) processing of an overlying dielectric layer is critical for successful integration. UV-resistant diffusion barrier layers are formed by depositing the layer in a hydrogen-starved environment. Diffusion barrier layers can be made more resistant to UV radiation by thermal, plasma, or UV treatment during or after deposition. Lowering the modulus of the diffusion barrier layer can also improve the resistance to UV radiation.

Methods for reducing UV and dielectric diffusion barrier interaction

Provided are methods of stabilizing an underlying dielectric diffusion barrier during deposition and ultraviolet (UV) processing of an overlying dielectric layer. Methods include modulating the optical properties reduces the effects of UV radiation on the dielectric diffusion barrier layer. The dielectric diffusion barrier can be made to absorb less UV radiation. A dielectric layer with UV absorbing properties may also be added on top of the diffusion barrier layer so less UV is transmitted. Both methods result in reduced interaction between UV radiation and the dielectric diffusion barrier.

Reducing UV and dielectric diffusion barrier interaction through the modulation of optical properties

Capping protective self aligned buffer (PSAB) layers are layers of material that are selectively formed at the surface of metal layers in a partially fabricated semiconductor device. Encapsulating PSAB layers are formed not only at the surface of the metal layers, but also within the unexposed portions of the metal lines. Encapsulating PSAB layer, for example, can surround the metal line with the PSAB material, thereby protecting interfaces between the metal line and diffusion barriers. Encapsulating PSAB layers can be formed by treating the exposed surfaces of metal lines with GeH. Capping PSAB layers can be formed by treating the exposed surfaces of metal lines with SiH. Interconnects having both a silicon-containing capping PSAB layer and a germanium-containing encapsulating PSAB layer provide good performance in terms of adhesion, resistance shift, and electromigration characteristics.

Growing community of inventors

San Jose, CA, United States of America

Kaushik Chattopadhyay