Applied Materials, Inc.

Other

Kaushal Kishore Singh

Joseph Michael Ranish

Ludovic Godet

David K Carlson

Mehul B Naik

Robert Jan Visser

Paul F Ma

Bencherki Mebarki

Omkaram Nalamasu

Annamalai Lakshmanan

Andrew Cockburn

Er-Xuan Ping

Randhir P Thakur

Byung-Sung Kwak

Srinivas D Nemani

Ellie Y Yieh

Randhir P S Thakur

Steven Verhaverbeke

Nety M Krishna

Sanjeev Aggarwal

Bruce E Adams

Lance A Scudder

Satheesh Kuppurao

Paul B Comita

Vijay Parihar

Stefan Bangert

Mei-Yee Shek

Sundar Ramamurthy

Bhaskar Kumar

Michael P Nault

Manish Hemkar

Anthony Lam

Soonil Hong

Choon Kun Ryu

Andrew Conners

Khaled Ahmed

Xianmin Tang

Majeed Foad

Wai-Fan Yau

Steve G Ghanayem

Stephen Roy Gilbert

Ralf Hofmann

Virendra V Rana

Sean M Seutter

Thomas Jongwan Kwon

Ashish Goel

Ping Xu

Joseph Grover Gordon, Ii

Ashutosh Agarwal

Jacob W Smith

Kai Ma

Stuardo A Robles

Ranga Rao Arnepalli

Virendra V S Rana

Michael R Snure

R Suryanarayanan Iyer

Steven C Hung

Minrui Yu

Victor Pushparaj

Deepak Jadhav

Ashutosh Tiwari

Charles Gay

Adam Brailove

Gaurav Saraf

Jeannot Morin

Srikant Rao

Claire J Carmalt

Sanjayan Sathasivam

Christopher Stuart Blackman

Robert Shydo

Stevan Hunter

Byung-sung Leo Kwak

The present disclosure provides methods for performing an annealing process on a metal containing layer in TFT display applications, semiconductor or memory applications. In one example, a method of forming a metal containing layer on a substrate includes supplying an oxygen containing gas mixture on a substrate in a processing chamber, the substrate comprising a metal containing layer disposed on an optically transparent substrate, maintaining the oxygen containing gas mixture in the processing chamber at a process pressure between about 2 bar and about 50 bar, and thermally annealing the metal containing layer in the presence of the oxygen containing gas mixture.

High pressure annealing process for metal containing materials

Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide layer on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide layer in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer. In another embodiment, a method includes supplying a deposition gas mixture including at least a metal containing precursor and a reacting gas on a surface of a substrate, forming a plasma in the presence of the deposition gas mixture by exposure to microwave power, exposing the plasma to light radiation, and forming a metal silicide layer on the substrate from the deposition gas.

Methods for forming a metal silicide interconnection nanowire structure

The present disclosure provides a film stack structure formed on a substrate and methods for forming the film stack structure on the substrate. In one embodiment, the method for forming a film stack structure on a substrate includes depositing a first adhesion layer on an oxide layer formed on the substrate and depositing a metal layer on the first adhesion layer, wherein the first adhesion layer and the metal layer form a stress neutral structure.

PVD deposition and anneal of multi-layer metal-dielectric film

Methods and apparatus for forming a metal silicide as nanowires for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes forming a metal silicide stack comprising as plurality of metal silicide layers on a substrate by a chemical vapor deposition process or a physical vapor deposition process, thermal treating the metal silicide stack in a processing chamber, applying a microwave power in the processing chamber while thermal treating the metal silicide layer; and maintaining a substrate temperature less than 400 degrees Celsius while thermal treating the metal silicide layer.

Laminate and core shell formation of silicide nanowire

The present disclosure generally provides a method for forming a photovoltaic device including evaporating a source material to form a large molecule processing gas and flowing the large molecule processing gas through a gas distribution showerhead and into a processing area of a processing chamber having a substrate therein. The method includes generating a small molecule processing gas, and reacting the small molecule processing gas with a film already deposited on a substrate surface to form a semiconductor film. Additionally, apparatuses that may use the methods are also provided to enable continuous inline CIGS type solar cell formation.

Methods for plasma activation of evaporated precursors in a process chamber

Embodiments described herein provide a remote plasma system utilizing a microwave source. Additionally, generation and deposition techniques for 2D transition metal chalcogenides with large area uniformity utilizing microwave assisted generation of radicals is disclosed. Plasma may be generated remotely utilizing the microwave source. A processing platform configured to deposit 2D transition metal chalcogenides is also disclosed.

Method and apparatus for microwave assisted chalcogen radicals generation for 2-D materials

Embodiments described herein generally relate to methods for forming silicide materials. Silicide materials formed according to the embodiments described herein may be utilized as contact and/or interconnect structures and may provide advantages over conventional silicide formation methods. In one embodiment, a one or more transition metal and aluminum layers may be deposited on a silicon containing substrate and a transition metal layer may be deposited on the one or more transition metal and aluminum layers. An annealing process may be performed to form a metal silicide material.

Methods for forming low resistivity interconnects

Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide based (GaAs) layer with or without dopants formed from a solution based precursor may be utilized in thin film transistor devices. The gallium arsenide based (GaAs) layer formed from the solution based precursor may be incorporated in thin film transistor devices to improve device performance and device speed. In one embodiment, a thin film transistor structure includes a gate insulator layer disposed on a substrate, a GaAs based layer disposed over the gate insulator layer, and a source-drain metal electrode layer disposed adjacent to the GaAs based layer.

Gallium arsenide based materials used in thin film transistor applications

Methods for direct deposition of a metal silicide nanowire for back-end interconnection structures for semiconductor applications are provided. In one embodiment, the method includes positioning a substrate in a processing region of a process chamber, the substrate having a first surface comprising a non-dielectric material; and a dielectric layer formed on the first surface. An opening is formed in the dielectric layer, the opening exposing at least a portion of the first surface, the opening having sidewalls. A metal silicide seed is deposited in the opening using a PVD process, wherein the PVD process is performed with either no bias or a bias which creates deposition on the sidewall which is less than 1% of the deposition on the first surface. A metal silicide layer is then selectively deposited on the metal silicide seed using a metal-silicon organic precursor, creating the metal silicide nanowire.

Direct deposition of nickel silicide nanowire

The present invention generally provides a method for forming a photovoltaic device including evaporating a source material to form a large molecule processing gas and flowing the large molecule processing gas through a gas distribution showerhead and into a processing area of a processing chamber having a substrate therein. The method includes generating a small molecule processing gas, and reacting the small molecule processing gas with a film already deposited on a substrate surface to form a semiconductor film. Additionally, apparatuses that may use the methods are also provided to enable continuous inline CIGS type solar cell formation.

Plasma enhanced thermal evaporator

Provided are methods and apparatus for functionalizing a substrate surface used as the channel in a gate stack. Silicon, germanium and silicon germanium substrates surfaces are functionalized with one or more of sulfur and selenium by plasma processing.

Method and apparatus for forming gate stack on Si, SiGe or Ge channels

Embodiments of the invention provide a method of forming a doped gallium arsenide based (GaAs) layer from a solution based precursor. The doped gallium arsenide based (GaAs) layer formed from the solution based precursor may assist solar cell devices to improve light absorption and conversion efficiency. In one embodiment, a method of forming a solar cell device includes forming a first layer with a first type of dopants doped therein over a surface of a substrate, forming a GaAs based layer on the first layer, and forming a second layer with a second type of dopants doped therein on the GaAs based layer.

High efficiency thin film transistor device with gallium arsenide layer

Embodiments of the invention generally relate to solar cell devices and methods for manufacturing such solar cell devices. In one embodiment, a method for forming a solar cell device includes depositing a conversion layer over a first surface of a substrate, depositing a first transparent conductive oxide layer over a second surface of the substrate that is opposite the first surface, depositing a first p-doped silicon layer over the first transparent conductive oxide layer, depositing a first intrinsic silicon layer over the first p-doped silicon layer, and depositing a first n-doped silicon layer over the first intrinsic silicon layer. The method further includes depositing a second transparent conductive oxide layer over the first n-doped silicon layer, and depositing an electrically conductive contact layer over the second transparent conductive oxide layer.

Methods for enhancing light absorption during PV applications

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Santa Clara, CA, United States of America

Kaushal Kishore Singh