Fujitsu Corporation

Katsuya Yamashita

Naoki Kuwata

Takuji Yamamoto

Hiroshi Hamano

Takeshi Ihara

Masazumi Marutani

According to a PLL circuit of the present invention, an output of a phase comparator is adjusted according to a space-to-mark transition-probability of an input signal so that an output of a voltage controlled oscillator has a predetermined frequency and phase. Therefore, even when a phase of a timing clock is set other than at, an output of the PLL circuit can be kept at the set phase, irrespective of the space-to-mark transition-probability. By using the PLL circuit as such in an optical communication apparatus and an optical communication system, a discrimination point can be kept almost fixed, and therefore, it is possible to lower an error rate.

Phase lock loop circuit and optical repeating apparatus, optical terminal apparatus, and optical communication system having the same

It is aimed at providing an optical receiving apparatus and an optical receiving method, which can assuredly receive and process signal lights having different transmission rates, by a simple and single device. To this end, the signal light received by the present optical receiving apparatus is converted into an electric signal by a light receiving element and thereafter sent to an equalizing amplifier whereby the signal is amplified. The transmission rate of this received signal is detected by a transmission rate detecting part, and a band of the equalizing amplifier is optimally controlled by an equalizing band controlling part, corresponding to the detected transmission rate. In case of adopting a PLL (phase-locked loop) circuit as a clock generating circuit, there is also controlled a band of a loop filter corresponding to the transmission rate detected by the transmission rate detecting part. Thus, there can be obtained an excellent reception characteristics, even when receiving signal lights having different transmission rates.

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Hachioji, Japan

Katsuya Yamashita