Mitsubishi Denki Kabushiki Kaisha

Katsuya Kosaki

Masahiro Tamaki

Hirofumi Nakano

Takao Ishida

Hiroshi Matsuoka

Tetsuo Kunii

Masaru Kinugawa

Takeo Nakamoto

Mitsunori Nakatani

Kiyoshi Nishikawa

Takeshi Kuragaki

Air trapped in a blind hole during processing of the blind hole with a liquid is eliminated by circulating the liquid along a surface-to-be-processed in substantially a single direction at all times and by setting a velocity gradient of the liquid over the surface to at least 300/second.

Chemical processing method, and method of manufacturing semiconductor device

An air trap in a blind hole is eliminated by circulating a liquid chemical along a surface-to-be-processed in substantially a given direction at all times and by setting a velocity gradient of the liquid chemical over the surface to 300/second or more thereby eliminating the air trap in the blind hole.

Chemical processor

A semiconductor device having a plated heat sink (PHS) layer on the back surface, preventing a short circuit between a bonding wire, and a first metal layer. A method of making a semiconductor device including forming a catalyst layer on a bottom of a first separation groove in the front surface of a semiconductor substrate, and forming the first metal layer selectively in the first separation groove by electroless plating, using the catalyst layer as a catalyst.

Semiconductor device

A method of plating which improves the uniformity of a plated coating thickness without changing the flow velocity of a feed plating solution. An aperture at a center of a mesh anode electrode of a plating apparatus produces an electric field density distribution between the mesh anode electrode and a wafer that is lower in the central portion of the wafer than at the edge portion of the wafer.

Method of plating semiconductor wafer and plated semiconductor wafer

In a semiconductor device, an opening having a high aspect ratio from a back surface of a GaAs substrate and is formed by anisotropic dry etching. After an Au film is deposited on the entire back surface of the GaAs substrate, including inside of the opening, a Ni alloy is non-electrolytically plated. The Ni film can also be deposited on the inner wall and bottom of the opening. An IC substrate or FET may have the Ni film only at an area corresponding to the via hole. The back surface of the IC substrate or FET and the front surface of a package substrate are bonded to each other by AuSn solder poorly wetting the Ni film.

Method of manufacturing semiconductor device

A semiconductor device has a plated heat sink layer on the back surface, preventing a short-circuit between a bonding wire and a first metal layer. A method of making a semiconductor device includes forming a catalyst layer on a bottom of a first separation groove in the front surface of a semiconductor substrate, forming a first metal layer selectively in the first separation groove by electroless plating, using the catalyst layer as a catalyst.

Method for manufacturing semiconductor device and semiconductor device

In a semiconductor device, an opening having a high aspect ratio extends from a back surface of a GaAs substrate and is formed by anisotropic dry etching. After an Au film is deposited on the entire back surface of the GaAs substrate, including inside of the opening, a Ni alloy is non-electrolytically plated. The Ni film can also be deposited on the inner wall and the bottom of the opening. An IC substrate or FET may have the Ni film only at an area corresponding to the via hole. The back surface of the IC substrate or FET and the front surface of a package substrate are bonded to each other by AuSn solder poorly wetting the Ni film.

Semiconductor device with high aspect ratio via hole including solder repelling coating

A method of producing a semiconductor device having a heat dissipating metal layer wherein the number of patterning steps is reduced, laser dicing produces a better profile, and first and second metal layers are prevented from separating from each other, and a semiconductor device produced by the method. The number of patterning steps is reduced by employing a flat exposure step for photoresist with mask alignment. A better appearance is obtained by forming the metal layers which connect the semiconductor devices with each other from a first metal layer having a lower melting point and a second metal layer having a higher melting point and severing the first metal layer and the second metal layer successively, from the first metal layer side. A second metal layer is prevented from peeling by preventing oxidation of the plated feeder layer through plating of the second metal layer.

Method of producing semiconductor device with heat dissipation metal layer and metal projections

The present invention provides for a plating apparatus and a method of plating, which improve the uniformity of a plated coating thickness without changing the flow velocity of a feed plating solution. An aperture can be provided at a center of a meshed anode electrode of the plating apparatus to obtain an electric field density distribution between the meshed anode electrode and a wafer that is lower in the central portion of the wafer than in the edge portion of the wafer.

Plating apparatus for plating a wafer

A method of producing a semiconductor device having a heat dissipating metal layer wherein the number of patterning steps is reduced, laser dicing produces a better profile, and first and second matal layers are prevented from separating from each other, and a semiconductor device produced by the method. The number of patterning steps is reduced by employing a flat exposure step for photoresist with mask alignment, A better appearance is obtained by forming the metal layers which connect the semiconductor devices with each other from a first metal layer having a lower melting point and a second metal layer having a higher melting point and severing the first metal layer and the second metal layer successively, from the first metal layer side. A second metal layer is prevented from peeling by preventing oxidation of the plated feeder layer through plating of the second metal layer.

Semiconductor device with heat dissipation metal layer and metal

A method of fabricating a semiconductor device includes forming a first chip separating groove such that its depth is less than the total depth of the wafer, forming a first metallization layer inside the first chip separating groove, thinning the wafer, forming a second chip separating groove in a region opposite the first chip separating groove of the rear surface of the wafer so that the wafer is separated into a plurality of semiconductor chips, forming metallization layer inside the second chip separating groove, forming a PHS layer on the entire rear surface of the wafer, and cutting the wafer at the chip separating groove, thereby producing a semiconductor device. The burr produced when the wafer is cut does not protrude from the rear surface of the wafer, assuring good adhesion between the semiconductor chip and a chip carrier, realizing a semiconductor device of a good heat dispersion characteristic and, therefore, of high reliability.

Method of fabricating semiconductor device

A method of fabricating a semiconductor device includes forming a first chip separating in a wafer having a groove depth is less than the thickness of the wafer, forming a first metallization layer inside the first chip separating groove, thinning the wafer, forming a second chip separating groove in a region opposite the first chip separating groove at the rear surface of the wafer for separating the wafer into a plurality of semiconductor chips, forming a metallization layer inside the second chip separating groove, forming a PHS layer on the entire rear surface of the wafer, and cutting the wafer at the chip separating groove, thereby producing a semiconductor device. The burr produced when the wafer is cut does not protrude from the rear surface of the wafer, assuring good adhesion between the semiconductor chip and a chip carrier, realizing a semiconductor device of a good heat dispersion characteristic and, therefore, of high reliability.

Semiconductor device with plated heat sink

An electroplating apparatus includes an electroplating tank having a generally flat base on which a semiconductor substrate may be placed with a surface to be electroplated oriented upwardly. A first seal seals a tank body to the flat base and a second seal seals the tank body to a peripheral portion of the surface of the semiconductor substrate. A substantially sealed volume adjacent the surface of the semiconductor substrate is produced. A gas supply tube for pressurizing the volume and an electrolyte discharge arrangement for discharging electrolyte from the volume when pressurized by a gas introduced through the gas supply tube are also provided. The discharge tube extends through a wall of the tank body to a position immediately above the surface of the semiconductor substrate within the volume.

Apparatus for electroplating a semiconductor substrate

An apparatus for adhering a wafer to a supporting substrate includes a chamber having a lower part including a wafer stage having a planar surface on which a wafer having a surface covered with an adhesive is mounted with the adhesive facing upward, an upper part for covering the planar surface of the wafer stage, an evacuation port for evacuating the chamber, and a pressure plate opposite a supporting substrate disposed on the wafer and movable downward so that the pressure plate presses the supporting substrate toward the wafer. At least three gauge blocks having a thickness larger than that of the wafer are disposed on the planar surface of the wafer stage, surrounding a wafer and sandwiched between the supporting substrate and the planar surface when the supporting substrate is pressed toward the wafer. Heaters for heating the wafer and the supporting substrate are embedded in the lower and upper parts of the chamber. A gap between the wafer and the supporting substrate and filled with the adhesive is uniform within the area of the wafer surface.

Growing community of inventors

Tokyo, Japan

Katsuya Kosaki