Panasonic Intellectual Property Corporation of America

Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Other

Sony Corporation

Matsushita Electric Works, Ltd.

Katsushige Amano

Tadao Tanikawa

Masahiko Saito

Manabu Inoue

Tadashi Yano

Yoshinori Tanabe

Tomonori Nakamura

Tetsuji Yamamoto

Kiyoshi Owada

Hiroyuki Machida

Takao Shinohara

Hiroki Noguchi

Wataru Iwai

Toshiaki Takeuchi

Masashi Sugiyama

Koji Asai

Ryota Miyazaki

Masashige Mizuyama

Teruo Kamiyama

Takuya Kondoh

Hiromitsu Kobayashi

Katsuhiro Arinobu

A method for controlling an autonomous device that moves in two dimensions using a controller includes obtaining a first image at a first position, which is a destination of the autonomous device, calculating, from the first image, first feature values indicating certain characteristics of the first image, referring to map information indicating correspondences between coordinate information indicating coordinates of defined positions included in a movement area of the autonomous device and second feature values, which are calculated from second images and indicate certain characteristics of the second images and identifying, by referring to the map information, a second position corresponding to second feature values having at least a predetermined degree of correspondence to the feature values generating a command for moving the autonomous device to the second position on the basis of coordinate information corresponding to the second position, and transmitting the command to the autonomous device.

Method for specifying position, terminal device, autonomous device, and program

A first control apparatus receives a device control log of a second control apparatus, and stores a shared log that results from adding the received device control log of the second control apparatus to a device control log of the first control apparatus. Upon acquiring a control request from a user to control the device, the first control apparatus determines based on the shared log whether the device is ready for control. If the device is determined to be ready, the first control apparatus transmits to the device a control command responsive to the acquired control request.

Method of controlling device in manner free from contention among multiple controllers

When a predetermined application program becomes the target of execution on a virtual machine that is currently being executed, the virtual machine that is currently being executed is designated as a parent virtual machine, and a child virtual machine to execute the predetermined application program is generated by forking. The generated child virtual machine is configured not to execute any application program other than the predetermined application program. The parent virtual machine executes a dummy application program instead of the predetermined application program.

Generating child virtual machine to execute authorized application with reduced risk of malware attack

A virtual machine system that restricts use of confidential information only to the case where an authentication has resulted in success. The virtual machine system includes first virtual machine, second virtual machine, and hypervisor. The first virtual machine includes: storage unit storing confidential information; and authentication unit configured to perform authentication and notify the hypervisor of result of the authentication. The second virtual machine uses virtual device that is virtualized storage device. When having received authentication result indicating authentication success from the authentication unit, the hypervisor enables the second virtual machine to access, as substance of the virtual device, storage area storing the confidential information, and when not having received the authentication result indicating the authentication success from the authentication unit, the hypervisor disables the second virtual machine from accessing the storage area storing the confidential information.

Virtual machine system, confidential information protection method, and confidential information protection program

A virtual machine control apparatuscontrols execution of a first type virtual machine Aand a second type virtual machine. The first type virtual machine Aincludes a start detection unitwhich detects an operation in the first type virtual machine Ato start usage of a device (external storage device). The first type virtual machine Aalso includes a start signal output unitwhich outputs a start signal when the start detection unitdetects the operation to start usage of the device. The second type virtual machineincludes a control unit (external storage device driver) which, when the start signal output unitoutputs the start signal while the device is in set in a low power mode (electrical power set to off), sets the device in a normal mode (electrical power set to on).

Virtual machine control apparatus and virtual machine control method

The present invention relates to a virtual machine system that includes a plurality of processors and executes a plurality of virtual machines in parallel with use of the plurality of processors. An aim thereof is to suppress power consumption without sacrificing the performance of the virtual machine system. When there are at least two processors that do not have any virtual machines allocated thereto, one of the at least two processors is supplied with power so as to be placed in a standby state, and a remaining one or more of the at least two processors are not supplied with power.

Virtual computer system, virtual computer control method and accumulation circuit

When a process judging unit judges that a target process is a protected process, a key judging unit judges whether a target key that is a key generated by a key generating unit is a first key or a second key. When the key judging unit judges that the target key is the first key, a VM communication managing unit notifies the target process of a memory ID of a protected memory region corresponding to the first key. When the process judging unit judges that the target process is an unprotected process, a key transforming unit transforms the target key from the first key to the second key based on the key transformation rule. An HV communication managing unit notifies the target process of a memory ID of an unprotected memory region corresponding to the second key.

Virtual computer system having a first virtual computer that executes a protected process, a second virtual computer that executes an unprotected process, and a hypervisor that controls the first and second virtual computers

A computer system enables two virtual machines with use of two virtual CPUs. The computer system includes a CPU that is allocated to the virtual CPU when the virtual CPU performs computer processing of the virtual machine other than timer processing; a tick CPU that is dedicated to timer processing and is allocated to the virtual CPU upon receiving an interrupt request (tick interrupt) for causing the virtual CPU to perform timer processing of the virtual machine; and interrupt controller that issues the tick interrupt to the tick CPU.

Computer system for controlling the execution of virtual machines

An information processing system that maintains balance in the processing loads between processors and that includes operating systems, which each perform execution control on processing tasks by assigning each task to a task group and causing all tasks in the same task group to be executed on the same processor, and a hypervisor that associates each processor with one or more task groups in the operating systems and causes each operating system to perform the execution control so that all tasks in the same task group are executed on the processor associated with the same task group. The hypervisor sequentially acquires load indicators indicating a processing load of each task group in each operating system, refers to the processing loads indicated by the sequentially acquired load indicators, and when determining that the processing loads are not balanced between the processors, re-associates the processors with the task groups.

Information processing system, method, program and integrated circuit for maintaining balance of processing loads with respect to real-time tasks

A branch prediction mechanism within an information processing device comprises a call stack where function arguments are stacked when function calls are performed. The call stack stores arguments relating to branch instructions within the function. The branch prediction mechanism stores the branch instruction address, the leading value of the call stack, and the branch destination address at branch instruction execution time, which are in correspondence, in a branch result buffer. A branch prediction unit obtains the branch instruction address and leading value of the call stack when notified of branch instruction execution, searches the branch result buffer for a branch destination corresponding to the address and leading value, and predicts the search result as the branch destination of the executed branch instruction. An instruction fetch unit fetches instructions from the branch destination predicted by the branch prediction unit.

Branch prediction using a leading value of a call stack storing function arguments

The interrupt level storing unit () stores one or more interrupt levels indicating the priority of a generated interrupt and stores the interrupt level having the highest priority among the stored interrupt levels as a second interrupt mask level. The second interrupt type determination unit () sets an interrupt level corresponding to the interrupt type of a newly generated interrupt. The priority determination unit () notifies the interrupt to the virtual machine control unit () when the interrupt level of the newly generated interrupt is higher than the stored second interrupt mask level. As a result, the priority of the virtual machine can be determined according to the task priority and the switching of virtual machines can be adequately controlled even if the virtual machines cannot notify the task priority.

Virtual machine control device, virtual machine control program, and virtual machine control circuit for managing interrupts of plural virtual machines

An access monitoring section () obtains access information including an address conforming to an address stored in a monitoring address setting section () from an access signal output from a CPU () to a peripheral device (). An access judging section () compares the access information received from the access monitoring section () and the last access information stored in an access storing section (), and stores the obtained access information in the access storing section () and requests the transmission of an exception generation notification to an exception generating section () when the received access information is different from the last access information while excluding the last access information stored in the access storing section () from access information to be compared when the received access information is the same as the last access information. By this construction, throughput can be reduced at the time of emulation and the peripheral device can be efficiently emulated.

Device emulation support apparatus, device emulation support method, device emulation support circuit and information processor

Each task #registers signal handlers belonging thereto in a signal-handler table through a handler registering section in an OS, and registers itself and the priority thereof in a task/handler priority table through a task registering section. When a signal is generated, a signal notifying section specifies a signal handler corresponding to the signal and the priority thereof by referring to the signal-handler table, and a task/handler selecting section selects a task or signal handler having a highest priority in the task/handler priority table. A task executing section executes the selected task and a signal-handler executing section executes the selected signal handler.

Task scheduling apparatus, task scheduling method, task scheduling program, storage medium and transmission medium

A process scheduling apparatus has a delayed task handling process for processing delayed tasks having variable priorities and multiple other processes for handling processes other than delayed tasks. Fixed priorities are assigned to the other processes. The process scheduler sequentially executes the delayed task handling process and the other processes according the assigned priorities. A delayed task registration processor stores newly generated delayed tasks with assigned priorities in a queuing table. A delayed task priority controller selects the delayed task with the highest priority in the queuing table. A process priority controller sets the priority of the delayed task handling process to the same priority as the priority of the delayed task with the highest priority.

Process scheduling apparatus, process scheduling method, program for process scheduling, and storage medium recording a program for process scheduling

To start up an operating system (OS), CPU performs initializations in three modes: The three modes include a first I/O initialization (Early init) () which is to be done serially when no threads are yet usable, without any advanced technique and with a long wait time until a next operation can be made; a second I/O initialization () which is to be done when threads are usable, in a plurality of steps parallelized with each other using the usable threads according to the dependency relation between devices to be initialized and with synchronization between the steps each by a barrier; and a third I/O initialization (Lazy init) () in which remaining initializations are done in parallel with each other using the threads commensurately to a user process when the user process becomes executable. The present invention is applicable to home-use electric or electronic appliances.

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Kyoto, Japan

Katsushige Amano