Canon Kabushiki Kaisha

Katsunori Kato

Atsushi Date

Noboru Yokoyama

Takafumi Fujiwara

Tadaaki Maeda

Hiroaki Ishii

In plural master apparatus connected to a bus, a master apparatus issues, to an arbiter, a request signal requesting the use of the bus after a lapse of a predetermined interval when the use of the bus becomes necessary, while another master apparatus issues, to the arbiter, a request signal requesting the use of the bus immediately when the use of the bus becomes necessary. The arbiter grants a right to use the bus by equally handling the request signals from the master apparatus. Also there is prepared a signal indicating a traffic in the bus, and the request signal is issued after the lapse of the interval in case of a high traffic but it is issued immediately in case of a low traffic. It is thus possible to adjust the practical priority of the but use right in detail or to dynamically change such priority by the presence or absence of such interval or a length thereof.

Method of arbitration for bus use request and system therefor

The present invention relates to an image processing apparatus and method for processing an original image in units smaller (typically) than the original image (e.g., tiles). In a case where image data based on such divided image data input from an input source is transferred to an external device, then if the external device which has to process the original image, interrupts processing, the input divided image data is sequentially discarded, unit by unit.

Apparatus and method for processing divided image data

A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are connected to a system bus bridge (SBB). The SBB connects any of the P bus, G bus and IO bus as a master and any of the MC bus and IO bus as a slave in dependence upon a request from a master. At this time the P bus and IO bus can be connected in parallel with the G bus and MC bus. As a result, access to the memory by the scanner/printer controller can be carried out in parallel with use of the input/output device by the CPU. This makes it possible to process a large quantity of data, such as image data, efficiently.

Bus management based on bus status

Method of delaying bus request signals to arbitrate for bus use and system therefor

Bus control apparatus solves the problem that a high-speed bus which supports only burst transfer cannot be used when the boundary of a transfer memory address is not coincident with a unit boundary. A scanner controller and printer controller connected to a G bus capable of performing only burst transfer and a B bus capable of performing even single transfer determine from the address and data length of data to be transferred whether the data does not match the memory boundary. If the data does not match this boundary, a data portion which is not accommodated within the burst transfer unit is single-transferred using the B bus. A data portion which is accommodated within the burst transfer unit is burst-transferred using the G bus.

Bus control apparatus

A scanner is connected to a G bus and a B bus by way of a scanner controller and a G bus/B bus interface (GBI). A printer is connected in a similar manner. Furthermore, the scanner controller is connected directly to a printer controller with a CP bus. The GBI is capable of performing DMA transfer and data can be transferred between the GBIs. Furthermore, data can be transferred by way of the G bus and a RAM or the B bus and the RAM. The GBI is connected to the scanner controller and the printer controller by way of FIFOs, respectively. Accordingly, an image input/output control system according to the present invention is capable of absorbing differences in data transfer speeds and can be connected to various kinds of scanners and printers.

Image input/output control system

The control apparatus reads the value of an external switch, and checks whether the apparatus serves as a control side or subordinate side. If the control apparatus serves as a subordinate side, it waits until the control side writes a configuration through a bus. If the control apparatus serves as a control side, it sets necessary values in itself, and writes a configuration in a device on the bus. In this way, the control apparatus can operate as both the control side and subordinate side.

Control apparatus for composite appliance

Memory management for use with burst mode

Bus management using logic-based arbitration among bus access requests

There is an image processing apparatus which can further digitally control the density of the image signal read out from the image file in which the dither-processed image signal was stored. This apparatus comprises an input device to input the dither-processed image signal, table memories which output the density correction data using the image signal of a plurality of bits inputted by the input device as an input address, and a visible output device to output the outputs of the table memories as visible outputs, wherein the input device reads out the dither-processed image signal from the image file.

Growing community of inventors

Kawasaki, Japan

Katsunori Kato