Fujitsu Corporation

Katsunobu Nomura

Shinichi Shiotsu

Masaya Tamamura

Hojo Masayasu

A semiconductor integrated circuit includes a chip having an element forming surface with a side thereof extending along a first direction, an output buffer portion provided on the element forming surface of the chip, a plurality of output transistors having different emitter areas provided on the element forming surface of the chip and arranged approximately in a line along a second direction, which is perpendicular to the first direction, and a pad provided on the element forming surface of the chip. An output circuit is formed by the output buffer portion, a portion or all of the output transistors and the pad. The output buffer portion, the output transistors and the pad are arranged approximately in a line along the second direction.

Semiconductor integrated circuit having regularly arranged transistor

A counter circuit includes Johnson-type counters of m stages, each counter including a plurality of flip-flops connected in a cascade connection, each flip-flop receiving a clock signal at a respective clock input end. In the constitution, signals at respective output ends of flip-flops in a (k-1)-th stage counter are simultaneously input to respective clock input ends of flip-flops in each counter of a k-th stage and more. As a result, it is possible to obtain a signal having an arbitrary ratio of frequency division with high speed, while relatively simplifying the circuit constitution.

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Kawasaki, Japan

Katsunobu Nomura