Renesas Technology Corp.

Renesas Device Design Corporation

Katsumi Miyazaki

A switching control circuit of synchronous rectification type that is capable of reducing dead time is obtained. Upon detection that an output potential rises above VDD-Va, a first sensor outputs an H signal to a first input terminal of a first NOR circuit, and the first NOR circuit outputs an L signal to a second input terminal of a second NOR circuit, and the second NOR circuit outputs an H signal to a first gate driving circuit. A PMOS is thereby turned on. Upon detection that the output potential falls below GND+Vb, a second sensor outputs an L signal to a first input terminal of a first NAND circuit, and the first NAND circuit outputs an H signal to a second input terminal of a second NAND circuit, and the second NAND circuit outputs an L signal to a second gate driving circuit. An NMOS is thereby turned on.

Switching control circuit with reduced dead time

A BTL amplifier has a resistance element connected to an output reference voltage input terminal of an inverting amplifier. For offset compensation of the BTL amplifier, a variable current source controller controls an input switching circuit to cause application of compensation input voltages sent from an internal reference voltage source to a first input terminal and a second input terminal. The variable current source controller also controls a variable current source in response to an output signal from a comparator to minimize an output offset voltage, whereby a current flowing through the resistance element is adjusted to control the voltage at the output reference voltage input terminal.

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Hyogo, Japan

Katsumi Miyazaki