Kabushiki Kaisha Toshiba

Katsumi Iyanagi

Toshiya Kotani

Hiromitsu Mashita

Takafumi Taguchi

Chikaaki Kodama

Takeshi Sonehara

Fumiharu Nakajima

Hisashi Kato

Takashi Nakazawa

Toru Matsuda

Murato Kawai

Taiga Uno

Shigeki Matsunaka

Hidefumi Mukai

Ryota Aburada

Michiya Takimoto

The memory cell array includes a memory string and a select transistor. The memory string includes plural memory cells connected in series, the memory string being formed to extend in a first direction as a lengthwise direction. The select transistor is connected to one end of the memory string. In the wiring section, a conductive layer and an interlayer insulating layer are laminated alternately to form plural layers. The conductive layer functions as a gate electrode of the memory cells and the select transistor. One select transistor includes plural conductive layers, and the plural conductive layers are connected in common by a common first contact. The plurality of the conductive layers and the first contact include a barrier metal formed in a periphery thereof. The plurality of the conductive layers and the first contact are in contact without the barrier metal therebetween at a boundary thereof.

Nonvolatile semiconductor memory device and method of manufacturing the same

According to an embodiment, a non-volatile memory device includes a first interconnection extending in a first direction, a plurality of second interconnections provided side by side on the first interconnection and extending in a second direction intersecting the first direction and a memory layer provided on a side surface of each second interconnection. The device also includes a control element provided between each of the second interconnections and the first interconnection, an element part extending in the second direction, and a control electrode facing a side surface of the element part via a first insulating film. An adjustment part is provided on the first interconnection and adjacent to a control element connected to a second interconnection disposed at an end position of the second interconnections arranged in the first direction, and a first outer electrode provided between the adjustment part and the control element disposed at the end position.

Non-volatile memory device

A magnetron sputtering apparatus includes a vacuum chamber, a target and a substrate holder disposed to face one another in the vacuum chamber, a magnetron disposed on the target side which is opposite to where the substrate holder is disposed, and a rotating mechanism for rotating the magnetron about an axis perpendicular to a face of the target. The magnetron includes an inner magnet formed of a sector-shaped frame and an outer magnet formed of a sector-shaped frame, these inner and outer magnets having a different polarity each other, the outer magnet being disposed to surround the inner magnet leaving a gap between the arcuate segments of the inner and outer magnets as well as a gap between straight segments of the inner and outer magnets, the width of these frames being substantially the same with each other.

Magnetron sputtering apparatus and method of manufacturing semiconductor device

In one embodiment, a photomask designing method is disclosed. The method includes dividing design pattern data into predetermined regions and obtaining a pattern perimeter for each of the divided regions. The method includes obtaining the pattern perimeter for an entire region of the design pattern data by repeating the obtaining the pattern perimeter for the each of the divided regions. The method includes obtaining a dimension conversion difference for the entire region of the design pattern data using the pattern perimeter for the entire region of the design pattern data and a correlation obtained in advance between a predicted pattern perimeter and a predicted dimension conversion difference. The method includes performing process proximity correction on the design pattern data using a value of the obtained dimension conversion difference, and creating exposure pattern data from the corrected design pattern data.

Photomask designing method, photomask manufacturing method, and photomask designing program

Pattern formation simulations are performed based on design layout data subjected to OPC processing with a plurality of process parameters set in process conditions. A worst condition of the process conditions is calculated based on risk points extracted from simulation results. The design layout data or the OPC processing is changed such that when a pattern is formed under the worst condition based on the changed design layout data or the changed OPC processing a number of the risk points or a risk degree of the risk points of the pattern is smaller than the simulation result.

Pattern generating method, method of manufacturing semiconductor device, and recording medium

A pattern data creating method comprising: referring to a first correspondence relation between an amount of dimension variation between a first pattern formed on a substrate and a second pattern formed by processing the substrate using the first pattern and either one of a pattern total surface area and a pattern boundary length of the first pattern; and creating pattern data for forming the first pattern.

Creating mask data of integrated circuit patterns using calculated etching conversion difference

A method for dimension conversion difference prediction includes: determining an opening angle at a conversion difference prediction point on basis of a design pattern data; and predicting a dimension conversion difference on basis of correlation between the opening angle and an actual measurement value of the dimension conversion difference, or a method for dimension conversion difference prediction includes: determining an incident amount of incident objects at a conversion difference prediction point on basis of a design data; and predicting a dimension conversion difference on basis of correlation between the incident amount and an actual measurement value of the dimension conversion difference.

Method for dimension conversion difference prediction, method for manufacturing photomask, method for manufacturing electronic component, and program for dimension conversion difference prediction

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Mie-ken, Japan

Katsumi Iyanagi