Hitachi, Ltd.

Renesas Technology Corp.

Katsumi Iwata

Takashi Ito

Naoki Yashiki

Kenichi Ishibashi

Kenzo Funatsu

Kazuhiro Tomonaga

To obtain a correct vector address even if an interrupt occurs during erasing or programming of the data in a built-in ROMby moving a part of a built-in RAMto a vector address area by a bus controller. Thereby, a microcomputer is prevented from running away and the safety of a system is improved at the time of on-board programming of the built-in ROM

Data processor

A data processor includes the normal mode providing narrow access space of CPU and the advance mode providing wide access space. Even in the normal mode, the transfer control section assures data transfer control exceeding the address range for access from CPU. Even when programs are generated exceeding the limit of program capacity for the access range of CPU in the normal mode, if the programs exceeding such limit are stored in the non-access area of ROM in the normal mode, the transfer control section accesses such programs and transfers these programs to RAM. Thereby CPU in the normal mode can use such programs transferred to RAM by making access thereto. Accordingly, limit of program capacity can be alleviated, while maintaining good program execution efficiency in the rather small access space of CPU in the data processor.

Data processor and data processing system

To obtain a correct vector address even if an interrupt occurs during erasing or programming of the data in a built-in ROM by moving a part of a built-in RAM to a vector address area by a bus controller . Thereby, a microcomputer is prevented from running away and the safety of a system is improved at the time of on-board programming of the built-in ROM

To obtain a correct vector address even if an interrupt occurs during erasing or programing of the data in a built-in ROM 18 by moving a part of a built-in RAM13 to a vector address area by a bus controller 27. Thereby, a microcomputer is prevented from running away and the safety of a system is improved at the time of on-board programming of the built-in ROM 18.

Data processor which accesses a second memory while responding to an

To obtain a correct vector address even if an interrupt occurs during erasing or programming of the data in a built-in ROM 18 by moving a part of a built-in RAM13 to a vector address area by a bus controller 27. Thereby, a microcomputer is prevented from running away and the safety of a system is improved at the time of on-board programming of the built-in ROM 18.

Data processor which controls interrupts during programming and erasing

A microcomputer constructed on a single semiconductor substrate comprises a microprocessor CPU, a read only memory ROM, a random access memory RAM, a common bus BUS for electrically connecting the microprocessor CPU, the read only memory ROM and the random access memory RAM, a plurality of timers TM, a plurality of input/output circuits I/O, a network portion NET for bringing the timers TM and the input/output circuits I/O into a desired connectional form, and a control register CRG for controlling the network portion NET. The control register CRG is coupled to the common bus BUS, and can have control bit information written thereinto by the microprocessor CPU. On the basis of the control bit information stored in the control register CRG, the network portion NET connects the timers TM and/or the input/output circuits I/O so as to achieve a specified circuit arrangement instructed by the control bit information.

Universal timing controller for video tape recorder servo system of

Operation of a clock generating circuit is stopped when the oscillation signals to be selectively transmitted to the clock generating circuit via a multiplexer are switched. The oscillation signals are generated by a first oscillation circuit at a relatively high frequency and by a second oscillation circuit which steadily oscillates at a relatively low frequency. The clock generating operation is resumed in synchronization with the switched oscillation signals.

Growing community of inventors

Kokubunzi, Japan

Katsumi Iwata