Hitachi Automotive Systems, Ltd.

Hitachi Astemo Ltd.

Katsumi Ikegaya

Shinichirou Wada

Takayuki Oshima

Keishi Komoriyama

Yoichiro Kobayashi

Kiyotaka Kanno

Masato Kita

Minoru Migita

Hiroshi Yoneda

Yoshiaki Mizuhashi

Yu Kawagoe

In a semiconductor device including a current mirror circuit, a highly reliable semiconductor device that reduces a variation in a mirror ratio of the current mirror circuit and suppresses a change with time in a pairing property of elements can be provided.

Mirror circuit devices with wide wirings

In a semiconductor device equipped with a current mirror circuit, a highly reliable semiconductor device capable of suppressing a change in a mirror ratio of the current mirror circuit over time is provided. A current mirror circuit that includes a first MOS transistor and a plurality of MOS transistors paired with the first MOS transistor, and a plurality of wiring layers formed on an upper layer of the MOS transistor are provided. The plurality of wiring layers are arranged such that wiring patterns have the same shape within a predetermined range from an end of a channel region of each of the first MOS transistor and the plurality of MOS transistors.

Semiconductor device and in-vehicle electronic control device using the same

Provided are a semiconductor device having small characteristic variations with time and high reliability and an in-vehicle control device using the same, the semiconductor device including a plurality of transistor elements constituting a current mirror circuit or a differential amplifier circuit that requires high relative accuracy. A semiconductor device includes a first metal-oxide-semiconductor (MOS) transistor, a second MOS transistor paired with the first MOS transistor, and insulation separation walls which insulate and separate elements from each other, wherein relative characteristics of the first MOS transistor and the second MOS transistor are in a predetermined range, the first MOS transistor and the second MOS transistor are relatively arranged in a gate width direction or a gate length direction, and distances between gate oxide films of the first MOS transistor and the second MOS transistor and the insulation separation walls facing the gate oxide films are the same as each other in a direction perpendicular to the gate width direction or the gate length direction.

Semiconductor device

An object is to provide a new electronic control unit that can improve detection accuracy of a sense current even in a region where the current value of the sense current is small. Provided is a sense current detection unit including a plurality of sense transistors that have different current flow rates and that are connected to current output transistors controlling a current flowing in a coil load. The current in the sense current detection unit is input to an analog/digital converter, and the current value of the current flowing in the sense current detection unit is converted into a digital value. The current value of the current flowing in the sense current detection unit is increased through a combination or a selection of the plurality of sense transistors of the sense current detection unit in a region where the current value of the main current of the current output transistors is small compared to a region where the current value of the main current is large.

Electronic control unit

Restraining a reduction in an electric current detection accuracy, which is due to the temperature difference between an output MOS transistor and a sense MOS transistor, and easing a limitation on the layout of the sense MOS transistor. A semiconductor device includes: an output MOS transistor that has an output transistor portion including a source, a gate, and a drain formed on a semiconductor chip, and outputs an electric current for driving an external load; and a sense MOS transistor that has a sense transistor portion including a source, a gate, and a drain formed on the semiconductor chip, and having a width equal to a transverse width of the output transistor portion, and that detects the electric current output from the output MOS transistor.

Provided is a vehicle-mounted semiconductor device enabling a temperature increase of active elements to be restricted. A vehicle-mounted semiconductor device includes: a semiconductor substrate; a plurality of active elements formed on the semiconductor substrate; a plurality of trenches surrounding the plurality of active elements to insulate and separate the active elements; and a terminal connecting in parallel the plurality of active elements insulated and separated by different trenches among the plurality of trenches and connected to an outside.

Semiconductor device, vehicle-mounted semiconductor device, and vehicle-mounted control device

It is an object of the present invention to provide a switch element and a load driving apparatus capable of suppressing a characteristic change of an on-resistance without lowering an off-breakdown voltage. The switching element includes a control electrode, an active element region, and an inactive element region, and the active element region and the inactive element region are formed adjacent to each other on the control electrode. Alternatively, in the load driving apparatus including a current driving switch element and a current detecting switch element that is connected in parallel to the load driving switch element and that detects an energization current of the load driving switch element, the current detecting switch element includes at least a control electrode, an active element region, and an inactive element region, and the active element region and the inactive element region are formed adjacent to each other on the control electrode.

Switch element and load driving device

To provide a semiconductor device capable of restricting the substrate bias effect of a high-side transistor while enhancing the heat radiation property of a low-side transistor. A high-side NMOS transistoris formed in a region Son the surface of a SOI substrate. A trenchsurrounds the high-side NMOS transistor. SiO(first insulator) embeds the trench. A low-side NMOS transistoris formed in a region Son the surface of the SOI substratearound the trench. The side face Sf connecting the region Sforming the low-side NMOS transistortherein and the backside of the SOI substrateis exposed.

On a transistor layer having arranged thereon multiple transistors each including a drain, a source, and a gate, metal interconnection layers serving as input side interconnection layers connected to the drains of the respective transistors and metal interconnection layers serving as output side interconnection layers connected to the sources of the respective transistors are arranged in parallel. Also provided are a plurality of through holes connecting the metal interconnection layers serving as input side interconnection layers to the drains of the respective transistors and connecting the metal interconnection layers serving as output side interconnection layers to the sources of the respective transistors. Resistance values of the plurality of through holes are changed along an arranging direction of the input side interconnection layers and the output side interconnection layers. Accordingly, current densities of the transistors arranged to be distributed in a two-dimensional manner can be uniform.

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Hitachinaka, Japan

Katsumi Ikegaya