Canon Kabushiki Kaisha

Other

Katsuhito Sakurai

Toru Koizumi

Hiroki Hiyama

Isamu Ueno

Shigetoshi Sugawa

Tetsunobu Kochi

Katsuhisa Ogawa

Masaru Fujimura

Akira Okita

Fumihiro Inui

Hideaki Takada

Tomoko Eguchi

Atsushi Furubayashi

Masanori Ogura

Kohichi Nakamura

Takahiro Shirai

Hiroaki Kobayashi

Hideo Kobayashi

Daisuke Yoshida

Mamoru Miyawaki

Akira Ishizaki

Hirofumi Totsuka

Hideyuki Arai

Yoshiaki Takada

Tesunobu Kochi

Kohei Matsumoto

Koichi Sono

Yuichiro Yamashita

Seiji Hashimoto

Hidekazu Takahashi

Tetsuya Itano

Takanori Watanabe

Mahito Shinohara

Nobuyuki Hirayama

Koichiro Iwata

Yasushi Matsuno

Takamasa Sakuragi

Shigeki Kondo

Satoshi Kato

Tadahiro Ohmi

Toshiaki Endo

Hidetoshi Hayashi

Kei Ochiai

Nobuaki Kakinuma

Tomoya Yoneda

Itsutaku Sano

Tatsuo Morimoto

Yuuichirou Hatano

Akira Oseto

Tatsunori Kato

Ryunosuke Ishii

Hiroki Hyama

Takahiro Nakayama

Isami Ueno

A semiconductor apparatus includes a stack of a first chip having a plurality of pixel circuits arranged in a matrix form and a second chip having a plurality of electric circuit arranged in a matrix form. A wiring path between a semiconductor element configuring the pixel circuit and a semiconductor element configuring the electric circuit or a positional relationship between a semiconductor element configuring the pixel circuit and a semiconductor element configuring the electric circuit is differentiated among the electric circuits.

Semiconductor apparatus and equipment

A semiconductor apparatus includes a stack of first and second chips each having a plurality of pixel circuits arranged in a matrix form. The pixel circuit of the a-th row and the e1-th column is connected to the electric circuit of the p-th row and the v-th column. The pixel circuit of the a-th row and the f1-th column is connected to the electric circuit of the q-th row and the v-th column. The pixel circuit of the a-th row and the g1-th column is connected to the electric circuit of the r-th row and the v-th column. The pixel circuit of the a-th row and the h1-th column is connected to the electric circuit of the s-th row and the v-th column.

An imaging device includes a first chip on which a plurality of first blocks is arranged in a matrix, and a second chip which includes a first block scanning circuit and a second block scanning circuit. The second chip includes a selection circuit configured to select driving timing given to a plurality of pixels, based on a signal output from the first block scanning circuit and a signal output from the second block scanning circuit. A second block includes a circuit other than the selection circuit.

Imaging device, imaging system, and moving body

A photoelectric conversion device comprising: a first substrate that includes a pixel circuit including a photoelectric conversion element; a second substrate having a signal processing circuit that drives the pixel circuit or processes a signal from the pixel circuit; a connection part electrically connecting the first substrate and the second substrate; and an inspection circuit, wherein the inspection circuit is formed in one of the first and second substrates and is connected to a wire supplying a first potential and being provided in the one of the first and second substrates, and the inspection circuit is connected via the connection part to a wire supplying a second potential and being provided in the other of the first and second substrates.

Photoelectric conversion device, method of manufacturing photoelectric conversion device, and method of manufacturing semiconductor device

An imaging device includes a plurality of pixels arranged to form a plurality of rows and a plurality of columns and each including a photoelectric converter, an accumulation time controller that controls accumulation time of the plurality of pixels, and an amplifier that amplifies a signal based on charge generated by the photoelectric converter. The plurality of pixels are divided into a plurality of pixel blocks each including at least two of the plurality of pixels, the accumulation time controller is configured to control the accumulation time individually for the plurality of pixel blocks, and the amplifier is configured to output, for one pixel block of the plurality of blocks, a plurality of signals which are amplified at different gains and correspond to accumulation time of a common frame.

Imaging device, imaging system, and movable object

An imaging apparatus is provided and is configured in such a manner that a plurality of first pixels are connected to a first AD conversion unit, and a plurality of second pixels are connected to a second AD conversion unit whereby the imaging apparatus has a beneficial connection relationship between the pixels and the AD conversion units.

Imaging apparatus, imaging system, moving object, and circuit chip

Provided is an imaging device configured to sequentially perform AD conversion for A signals of pixels of the first row, A signals of pixels of the second row, A+B signals of the pixels of the first row, and A+B signals of the pixels of the second row.

According to an aspect of the present invention, there is provided an imaging device including: a plurality of pixels, each pixel including a photoelectric conversion unit that photoelectrically converts received light, a read node in which a signal charge generated in the photoelectric conversion unit is accumulated, and a first readout circuit that performs analog-to-digital conversion to convert a signal based on the signal charge accumulated in the read node into a digital signal; and a second readout circuit that reads a signal based on the signal charge, the signal having a smaller amplitude than a resolution of the analog-to-digital conversion of the first readout circuit.

Imaging device

A photoelectric conversion unit generates an amount of charges. A differential amplifier has first and second input transistors and is configured to output a current signal based on the amount of charges. A reset voltage providing unit is configured to provide a reset voltage for input nodes of the first and second input transistors. A transfer transistor is electrically connected to, and configured to transfer a charge to, the input node of the first input transistor. A reset transistor is electrically connected to one of the input nodes, and configured to control an electrical connection between the reset voltage providing unit and the input node connected to the reset transistor. A connection transistor has first and second nodes and is configured to control an electrical connection between the input nodes. The first and second nodes are connected to the input nodes of the first and second input transistors, respectively.

Photoelectric conversion device and operation method for photoelectric conversion device

An electronic device according to one or more embodiments of the present invention comprises an output line, a current mirror circuit and a comparator. Current signals from a plurality of signal sources are output to the output line. The current mirror circuit is electrically connected to the output line. The comparator is configured to compare a mirrored current signal from the current mirror circuit with a reference current signal. The comparator is configured to output a signal representing a comparison result of amplitudes of the mirrored current signal and the reference current signal.

Image pickup device

Growing community of inventors

Machida, Japan

Katsuhito Sakurai