Hitachi, Ltd.

Hitachi Video Engineering, Incorporated

Katsuhiko Tonami

Susumu Yoshida

Tamotsu Ito

Hitoshi Akiyama

Michitaka Ohsawa

Makoto Onozawa

Akinobu Watanabe

Keiji Nagayama

Hiroyuki Hayakawa

When a channel which is not scrambled is selected, an error occurs in a digital stream processed in a CA processing module, which causes noises to occur in video and audio signals to be viewed. If a FAT channel to be received is a channel that is not CA-scrambled, a digital stream is directly supplied from a FAT demodulator to a demultiplexer without passing the digital stream through an external processing module. As a result, no noise occurs in video and audio signals to be viewed because the video and audio signals are not influenced by an error of the digital stream that occurs in the processing module.

Receiver and receiving method

In a DVD video player with a built-in CD-R drive, until it reaches the state that the data of an optical disk can be reproduced, the output is switched into the reproduction output from a flash memory, a record medium that is quick to start reading. This makes it possible to develop user interfaces such as: voluntarily reproducing an audio information from the flash memory to add music sounds or sounds with special effects to the screen saver, in replacement of the optical disk drive that cannot read data during the screen saver being in operation or being in standby; reproducing the sounds with special effects; reproducing click sounds in response to a key input from the key or the remote control unit; and announcing to inform of the state to the user.

Recording/reproducing method and device with supplementary data storage and output

A horizontal deflection circuit comprising a horizontal output transistor, and a drive circuit is connected between the base and the emitter of the horizontal output transistor to supply a base drive voltage to the horizontal output transistor in order to control the conduction between the collector and the emitter of the horizonal output transistor, wherein first and second switching means are provided in parallel between the base of the horizontal output transistor and the drive circuit (or between the emitter of the horizontal output transistor and the drive circuit), the first switching means permitting only the current to flow from the base of the horizontal output transistor to the drive circuit (or from the drive circuit to the emitter of the horizontal outut transistor) and the second switching means being conductive only during the conductive period of the horizontal output transistor.

Horizontal deflection circuit

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Fujisawa, Japan

Katsuhiko Tonami