Mitsubishi Denki Kabushiki Kaisha

Liquid Concerned Ltd.

Zeotec Lrc Corporation

Katsuhiko Tamura

Tohru Koyama

Kenji Kusakabe

Yoshiko Kokawa

Yasuna Nakamura

Takaaki Fukumoto

Yukari Imai

Naoko Otani

Yasukazu Mukogawa

Masaharu Hama

Atsuko Kawai

Noboru Inoue

Kimihiko Okaue

A semiconductor memory device effectively prevents formation of a gate bird's beak oxide film at a region through which electrons move in data writing and erasing operations. In the semiconductor memory device, nitride films having a thickness larger than that of a first gate oxide film are formed on a drain impurity diffusion layer and a source impurity diffusion layer to surround the first gate oxide film. A floating gate electrode has opposite ends protruded over the nitride films.

Method of making semiconductor device with floating bate

Semiconductor memory device and manufacturing method of the same

A semiconductor device without erroneous operation and deterioration of characteristics in a transistor even when an impurity region is formed in self-alignment by ion implantation using a gate electrode as a mask, and a method of manufacturing thereof are disclosed. This semiconductor device includes a gate electrode formed of a polycrystal silicon layer 4b having the crystal orientation of the crystal grains arranged in a definite orientation. By implanting ions at a predetermined angle with respect to the crystallographic axis of the crystal grains of the polycrystal silicon layer 4b in forming a p.sup.+ impurity region 5 by ion implantation using the gate electrode as a mask, the channeling phenomenon where ions pass through the gate electrode is prevented. Therefore, generation of erroneous operation and deterioration of characteristics in a transistor are prevented in forming an impurity region in self-alignment by ion implantation using the gate electrode as a mask.

Semiconductor device having a gate electrode of polycrystal layer and a

According to a method of manufacturing a semiconductor device, a monocrystal silicon layer can be formed easily without adversely affecting semiconductor elements. In the method of manufacturing the semiconductor device, a first polysilicon layer is formed on a gate oxide film layer on a silicon substrate, and then a resist is formed on a predetermined region of the first polysilicon layer. Using the resist as a mask, anisotropic etching is effected to expose the surface of the silicon substrate. Thereby, it is not necessary to form the resist directly on the gate oxide film layer, as is done in the prior art, and it is possible to prevent impurity such as sodium or phosphorus in the resist from entering the gate oxide film layer. Consequently, it is possible to prevent a disadvantage such as change of a threshold voltage of a memory cell transistor, which may be caused by the entry of impurity.

Method of manufacturing a semiconductor device having a monocrystal

A DRAM providing a capacitor capacity sufficient for maintaining stable storage of data even if elements are further reduced in size in accordance with high density integration of semiconductor devices is disclosed. The DRAM has its capacitor upper electrode formed of an upper layer and a lower layer, and its capacitor lower electrode formed to surround the lower layer of the capacitor upper layer, and the upper layer of the capacitor upper layer formed to cover the upper surface and both sides of the capacitor lower electrode. Thus, a capacitor capacity is tremendously increased as compared to a conventional one in the same plane area as the conventional one.

Semiconductor device having stacked type capacitor

A semiconductor device not aggravated in transistor characteristic even when an impurity region is formed by ion implantation using a gate electrode as a mask, and a method of manufacturing thereof are disclosed. The semiconductor device includes a gate electrode 10 implemented by a polycrystal silicon layer 4 having the crystal orientation of the crystal grains thereof arranged in a predetermined orientation, and a single crystal silicon layer 5 formed on the polycrystal silicon layer 4 having a crystal orientation identical to that of the polycrystal silicon layer 4. The channelling phenomenon in which B.sup.+ ions pass through to beneath the gate electrode 10 is prevented in forming an impurity region 6 by ion implantation to obtain a semiconductor device that does not have the characteristic of the formed transistor aggravated.

Method of manufacturing semiconductor device having a two layered

Semiconductor device having a two layered structure gate electrode

Disclosed is a liquid filter device for effectively eliminating impurities from liquid. Voltage is applied to liquid to break electrostatic coupling of liquid molecules and impurity molecules. The impurity molecules are electrostatically adsorbed by an electrode containing adsorbent having charges different in polarity from those of the impurity molecules. Voltage is applied to liquid to break electrostatic coupling of liquid molecules and impurity molecules. Adsorbent having charges different in polarity from those of the impurity molecules on its surface is provided between a pair of electrodes to electrostatically adsorb the impurity molecules. After the impurity molecules are electrostatically adsorbed, the liquid is filtrated by a filter. Voltage is applied to liquid to eliminate zeta potentials which are potential difference at electric double layers having charges different in polarity from those of impurity particles in interfaces between the impurity particles and the liquid. The impurity particles are electrostatically aggregated, and the liquid is filtrated by a filter.

Liquid filter device

A sampled flow of water is extracted from a water conduit 1 carrying impure water by a sampling tube 2, the pressure at a point in the sampling tube is kept constant by a constant pressure maintaining valve 4, and the sampled water passed through a filter 7. The flow rate of sampled water passing through the filter 7 is measured by a flow meter 8. A value corresponding to the total amount or level of impurity in the sampled water is evaluated by an operation circuit 9 at a prescribed time interval, based on the time-dependent change in the result of measurement of the flow meter 8 and the total amount or level of impurities in pure water is thus measured indirectly.

Growing community of inventors

Hyogo, Japan

Katsuhiko Tamura