Advanced Micro Devices Corporation

Kathryn E Wilcox

Russell J Schreiber

Eric W Busta

Aaron Keiichi Horiuchi

Donald A Clay

Te-Hsuan Chen

William Edwin Laub, Jr

Michael Edward Griffith

Stephen J Dussinger

Hye Jung Stanford

Ruochen Xie

A system and method for efficiently designing a through silicon via (TSV) macro blocks are described. In various implementations, the circuitry of a processor executes instructions of a place and route tool that provides automatic placement of macro blocks and standard cells on an integrated circuit die based on a copy of a netlist of the integrated circuit being designed and a copy of a standard cell library that includes a variety of standard cells and macro blocks. The processor places two functional macros in the floorplan with a channel between them. In the channel, the processor places a TSV macro that includes at least one boundary cell inside of the TSV macro. The processor prevents placement of a boundary cell adjacent to at least one side of the TSV macro despite empty space exists due to no standard cells or macros about the at least one side.

Through silicon via macro with dense layout for placement in an integrated circuit floorplan

Growing community of inventors

Boxborough, MA, United States of America

Kathryn E Wilcox