The Mathworks, Inc.

Katalin Maria Popovici

Ramamurthy Mani

Hidayet Tunc Simsek

Rajiv Ghosh-Roy

Zhihong Zhao

Pieter Johannes Mosterman

John Edward Ciolfi

Brian Keith Ogilvie

Girish Venkataramani

Jared D MacDonald

Wang Chen

Wei Zang

Matthew H Fornero

Adam C Leon

Benjamin Charles Martin

Senthilkumar Manickavasagam

Thomas G Bolton

Abhijeet H Gadkari

Sina Yamac Caliskan

Systems and methods analyze an executable simulation model to identify existing concurrency, determine opportunities for increasing concurrency, and develop proposed modifications for realizing the opportunities for increased concurrency. The systems and methods may label locations at the simulation model where concurrency exists, and provide information regarding the proposed modifications to increase the model's concurrency. The systems and methods may modify the simulation model if the additional concurrency is accepted. The systems and methods may operate within a higher-level programming language, and may develop the proposed modifications without lowering or translating the simulation model to a lower abstraction level. The systems and methods may also undo a modification, rolling the simulation model back to a prior design state. Accepting the proposed modifications may cause the simulation models to execute more efficiently, e.g., faster.

Systems and methods for performing concurrency analysis in simulation environments

A method may include receiving functional model information regarding a set of functional blocks associated with a functional model. The functional model may include a streaming algorithm for exchanging streaming data. The method may include receiving architectural model information regarding physical devices included in a target device from a hardware-software co-design platform. The physical devices may include a software based processing device and a hardware based processing device. The method may include mapping the functional blocks to the physical devices to allow the streaming data to be communicated between the software based processing device and the hardware based processing device. The method may include generating a streaming interface to model communication of the streaming data between the software based processing device and the hardware based processing device. The method may include generating computer code for implementing the functional model on the target device and outputting the computer code.

Streaming on hardware-software platforms in model based designs

In an embodiment, a system may receive information regarding a group of physical devices; receive information regarding a set of functional blocks associated with a functional model; and receive mapping information that indicates a mapping between the set of functional blocks and one or more physical devices of the group of physical devices. The system may further generate at least one functional effect associated with the functional model. The generating may be based on: the set of functional blocks, the mapping information, and the information regarding the one or more physical devices. The system may also store or output the at least one functional effect.

Automatic modeling, mapping, and code generation for homogeneous and heterogeneous platforms

A device receives information specifying a functional model that includes a set of variables and a set of computations, and receives debugging information associated with the functional model. The device generates computer code based on the set of computations associated with the functional model, the set of variables associated with the functional model, and the received debugging information. The device executes the generated computer code based on the debugging information.

Unified hardware and software debugging

A device receives information associated with a functional model, and generates the functional model based on the received information and with a technical computing environment (TCE), where the functional model including nodes, inputs, and outputs. The device also automatically detects architecture information from an architecture model associated with the functional model, and automatically assigns, based on the architecture information, at least one signal between two nodes of the functional model, a node and an input of the functional model, or a node and an output of the functional model. The device obtains information for code generation based on the assigned at least one signal, and stores the information for code generation.

Automatic assignment of signals for a functional model

Exemplary embodiments allow executable graphical models, such as block diagram models, to be graphically partitioned for execution on concurrent computing resources. Embodiments allow model components to be grouped into subtasks that are affiliated with tasks associated with concurrent computing resources. Tasks and sub graphs can be mapped to concurrent computing resources according to characteristics, such as sample time, solver type, etc. Embodiments further allow mappings to be visually indicated to a user via various display techniques including color, text, icons, shading, grouping of identifiers, etc. Concurrently executing portions of a model allows model results to be obtained faster than can be obtained when models are executed on a single computing resource, such as a single processor.

Graphical partitioning for parallel execution of executable block diagram models

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Natick, MA, United States of America

Katalin Maria Popovici