Qualcomm Incorporated

Karthikeyan Ethirajan

Inyup Kang

Matthew Levi Severson

Manoj Sachdev

Amr M Fahim

Mohamed Elgebaly

A method and apparatus for voltage regulation uses, in one aspect, worst-case supply voltages specific to the process split of the integrated device at issue. In another aspect, a two-phase voltage regulation system and method identifies the characterization data pertinent to a family of integrated circuit devices in a first phase, and identifies an associated process split of a candidate integrated circuit device in a second phase. The characterization data from the first phase is then used to provide supply voltages that correspond to target frequencies of operation for the candidate device. In another aspect, a hybrid voltage regulator circuit includes an open loop circuit which automatically identifies the process split of the integrated circuit device and allows a regulator to modify supply voltage based on characterization data specific to that process split, and a closed loop circuit which fine-tunes the supply voltage. In one embodiment, the closed-loop circuit includes a critical path replica for providing estimated frequencies of operation necessary for a critical path in the integrated circuit device. A ring oscillator circuit may be used in one embodiment in the critical path and/or in the open loop circuit.

Robust and Efficient dynamic voltage scaling for portable devices

An integrated circuit for a modem processor includes processing units that are partitioned into 'always-on' and 'collapsible' power domains. An always-on power domain is powered on at all times. A collapsible power domain can be powered off if the processing units in the power domain are not needed. A power control unit within an always-on power domain powers down the collapsible power domains after going into sleep and powers up these domains after waking up from sleep. Tasks for powering down the collapsible power domains may include (1) saving pertinent hardware registers for these power domains, (2) freezing output pins of the IC to minimally disturb external units, (3) clamping input pins of the collapsed power domains, (4) powering down a main oscillator and disabling the oscillator clock, and so on. Complementary tasks are performed for powering up the collapsed power domains.

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San Diego, CA, United States of America

Karthikeyan Ethirajan