Dialog Semiconductor (uk) Limited

Karthik Jayaraman

Mark Mercer

Kevin Dowdy

Chanchal Gupta

Lasse Harju

The present document relates to power converters with multiple feedback loops. The present document relates to a power converter with at least two feedback loops. The power converter may comprise a first error amplifier and a first capacitive element. The power converter may comprise a second error amplifier and a second capacitive element, wherein the second error amplifier is configured to generate, based on a second reference value and a second feedback signal, a second error current for charging the second capacitive element. The power converter may comprise a selector circuit configured to generate a selection signal by comparing a first voltage of the first capacitive element and a second voltage of the second capacitive element. The power converter may comprise a first track amplifier circuit configured to establish an additional current path from a supply rail to the first capacitive element for accelerated charging of said first capacitive element.

Preventing inter-loop interference in a multi-feedback loop system

The present document relates to power converters with multiple feedback loops. The present document relates to a power converter with at least two feedback loops. The power converter may include a first error amplifier configured to generate a first error signal based on a first reference signal and a first feedback signal. The power converter may include a second error amplifier configured to generate a second error signal based on a second reference signal and a second feedback signal. The power converter may include a selector circuit configured to generate a selection signal by selecting the first error signal or the second error signal. The power converter may include a first clamp circuit configured to limit the first error signal to a first threshold value. The power converter may include a first threshold value generator circuit configured to generate the first threshold value dependent on the first error signal.

Adaptive error amplifier clamping in a multi-feedback loop system

A two-stage power converter includes a dual-level driver to control a current conducted by a switch transistor in a charge pump to control the charging of a flying capacitor in the charge pump.

Transient response optimization for charge-pump-based two-stage power converter

Power converters and method with reverse charge capability are presented. A power converter operates either in a buck mode for transferring electrical power from a first terminal of the power converter to a second terminal of the power converter, or in a boost mode for transferring electrical power from the second terminal of the power converter to the first terminal of the power converter. The power converter has several switching elements, a flying capacitor, an inductor, and a control unit. The switching elements couple the first terminal of the power converter and the flying capacitor, couple the first terminal of the flying capacitor and a first terminal of the inductor, couple the first terminal of the inductor and a second terminal of the flying capacitor and couple the second terminal of the flying capacitor and a reference potential. The control unit controls the switching elements.

Multi-level buck converter with reverse charge capability

A synchronous buck converter is provided in which a replica transistor has its drain coupled to a drain of the low-side switch transistor. A current sensing amplifier drives a scaled current into the replica transistor such that the drain-to-source voltage of the replica transistor substantially equals the drain-to-source voltage of the low-side switch. The replica transistor is much smaller than the low switch transistor such that the replica transistor's on resistance is higher by a scale factor Kf as compared to the on resistance for the low-side switch transistor.

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Chandler, AZ, United States of America

Karthik Jayaraman